PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 52

• Manufacturer Part Number: PEF82912FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PEF82912FV1.4

• Mounting Style: SMD/SMT
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

•
Table 9
Compared to example 5 in example 7 a third STOVxy
generated additionally for both STIxy
A STOV interrupt is not generated if all stimulating STI interrupts are acknowledged.
A STIxy must be acknowledged by setting the ACKxy bit in the ASTI register two BCL
clock (for DPS=’0’) or one BCL clocks (for DPS=’1’) before the time slot which is selected
for the appropriate STIxy. The interrupt structure of the synchronous transfer is shown
in
Data Sheet
Figure
xy
xy
xy
0
0
0
STI
xy
xy
xy
Enabled Interrupts
-
; xy
; xy
; xy
(Register MSTI)
0
0
0
17.
1
1
1
Examples for Synchronous Transfer Interrupts
xy
0
xy
xy
STOV
; xy
0
0
xy
xy
xy
-
; xy
; xy
0
1
1
1
; xy
1
1
2
0
and STIxy
Generated Interrupts
38
STI
xy
xy
xy
xy
xy
xy
xy
xy
xy
-
0
0
0
0
1
0
1
0
1
(Register STI)
1
.
2
is enabled and thus STOVxy2 is
xy
xy
xy
STOV
0
0
1
xy
xy
xy
xy
-
-
-
; xy
; xy
; xy
Functional Description
1
0
1
1
1
2
2
PEF 82912/82913
Example 1
Example 2
Example 3
Example 4
Example 5
Example 6
Example 7
2001-03-30