PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 28

• Manufacturer Part Number: PEF82912FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PEF82912FV1.4

• Mounting Style: SMD/SMT
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

Test Modes
The test patterns on the S-interface (‘2 kHz Single Pulses‘, ‘96 kHz Continuous Pulses‘)
and on the U-interface (‘Data Through‘, ‘Send Single Pulses‘) are invoked via C/I codes
(TM1, TM2, DT, SSP). Setting SRES.RES_U to ‘1‘ forces the U-transceiver into test
mode ‘Quiet Mode‘ (QM), i.e. the U-transceiver is hardware reset.
1.8
•
Figure 3
The U-transceiver, S-transceiver and the IOM -2 channels can be controlled and
monitored via:
Data Sheet
a) the parallel or serial microprocessor interface
- Access of on-chip registers via µP interface Address/Data format
- Activation/Deactivation control of U- and S-transceiver via µP interface and C/I
handler
- Q-SMINT I is Monitor channel master
- TIC bus is transparent on IOM -2-interface and is used for D-channel arbitration
between S-transceiver and off-chip HDLC controllers.
POTS Interface
S/T - Interface
USB / V.24 Interface
System Integration
Application Example Q-SMINT I: High Feature Intelligent NT
HV - SLIC
HV - SLIC
SLICOFI - 2
S
IOM-2
PEF 82912
PEF 82913
Q-SMINTI
14
µP
U
DC/DC Converter
PEB2023
IDCC
MLT
C 165 Core
4x HDLC
IOM-2
PEF 82912/82913
UTAH
USB/
V.24
HENTappl.vsd
U - Interface
2001-03-30
Overview