Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 60

• Manufacturer Part Number: Z16M1720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z16M1720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
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7 U G T / C P W C N
For example, the Z80 DMA can be programmed either to stop, interrupt the
CPU, continue, or repeat a transfer when a target event such as an end-of-
block, byte match, or Ready-line condition is reached. Alternatively, its
buffered address counters can be reloaded during one byte-mode transfer so
that the next transfer can begin quickly at a new location. Also, entire read
and write cycle timings can be modified independently for each port to fit
the requirements of other CPUs, memory, or I/O devices that are faster or
slower than the standard Z80 Family timing.
This topic, as well as the others described earlier, are expanded in following
chapters. They are introduced here to give a generalized framework from
which to launch a more detailed discussion of the Z80 DMA.
(See also Figure 20 through Figure 23).
Figure 17.
YES
(Single)
Request
Transfer
Release
NO
BYTE
Control
Control
Active
RDY
Byte
Modes of Operation
?
YES
(Demand)
NO
BURST
Request
Transfer
Release
Control
Control
Active
Byte
RDY
?
Direct Memory Access
YES
CONTINUOUS
NO
Request
Transfer
Control
(Block)
Active
RDY
Byte
?