Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 310
Z16M1720ASG1868
Manufacturer Part Number
Z16M1720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z16M1720ASG1868
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Table 28. Data Character Format
Data Terminal Ready (D7)
This is the control bit for the DTR pin. When set, DTR is active (Low);
when reset, DTR is inactive (High).
Write Register 6
This register is programmed to contain the transmit sync character in the
Monosync mode, the first eight bits of a 16-bit sync character in the Bisync
mode, or a transmit sync character in the External Sync mode. In the SDLC
mode, it is programmed to contain the secondary address field, which is
used to compare against the address field of the SDLC frame.
Figure 120. Write Register 6
D7
1
1
1
1
0
D7
*Also SDLC Address Field
D6
D6
1
1
1
0
0
D5
D5
1
1
0
0
0
D4
D4
1
0
0
0
D
D3
0
0
0
D
D
D3
D2
D1
D2
0
0
D
D
D
D0
D1
0
D
D
D
D
D0
D
D
D
D
D
SYNC Bit 0
SYNC Bit 1
SYNC Bit 2
SYNC Bit 3
SYNC Bit 4
SYNC Bit 5
SYNC Bit 6
SYNC Bit 7
Result
Sends one data bit
Sends two data bits
Sends three data bits
Sends four data bits
Sends five data bits
Serial Input/Output
*
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