Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 307

• Manufacturer Part Number: Z16M1720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z16M1720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
used for both the receiver and transmitter. The system clock in all modes
must be set to at least 4.5 times the data rate. If the x1 clock rate is selected,
bit synchronization must be performed externally.
Table 25. Clock Rate
Write Register 5
WR5 contains control bits that affect the operation of transmitter, with the
exception of D2, which affects the transmitter and receiver.
Table 26. Write Register 5 Transmitter Control
Transmit CRC Enable (D0)
This bit determines if CRC is calculated on a specific transmit character. If
it is set at the time the character is loaded from the transmit buffer into the
transmit shift register, CRC is calculated on the character. CRC is not auto-
matically sent unless this bit is set when the Transmit Underrun condition
occurs.
D7
DTR
Clock Rate 1
D6
Tx
Bits/
Char 1
0
0
1
1
D5
Tx
Bits/
Char 0
Clock Rate 0 Result
0
1
0
1
D4
Send
Break
Data Rate x1 = Clock Rate
Data Rate x16 = Clock Rate
Data Rate x32 = Clock Rate
Data Rate x64 = Clock Rate
D3
Tx
Enable
D2
CRC-16/
SDLC
Z80 CPU Peripherals
Serial Input/Output
D1
RTS
User Manual
DO
Tx
CRC
Enable
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