Z16M1720ASG1868 Zilog, Z16M1720ASG1868 Datasheet - Page 160
Z16M1720ASG1868
Manufacturer Part Number
Z16M1720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z16M1720ASG1868
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
represent the fractional reductions in CPU throughput per Kbaud trans-
ferred.
The DMA has a shorter and more predictable latency period and decreases
system overhead by at least a factor of five in this conservative example.
A diagram of a typical Z80 system using a Z80 CPU, a Z80 CTC for asyn-
chronous baud rate generation, both channels of a Z80 SIO, and two Z80
DMAs (one for each serial channel) appears in Figure 55. The diagram
omits the system memory (ROM and RAM), bus buffers (as required), and
chip enable decoders, which are described above.
DMA sequential transfer
DMA sequential transfer/search
Interrupt-driven transfer
Z80
(2.5 MHz)
0.065%
0.340%
Direct Memory Access
Z80A
(4 MHz)
0.041%
0.213%
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