XW2B-80J7-1A Omron, XW2B-80J7-1A Datasheet - Page 163

• Manufacturer Part Number: XW2B-80J7-1A
• Description: RELAY UNIT
• Manufacturer: Omron

Specifications of XW2B-80J7-1A

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: XW2B80J71A

Interrupt Functions
7-2
7-2-1
Executing Interrupt
Programs in the
FQM1
Input Interrupts
Interval Timer Interrupts
High-speed Counter
Interrupts
Pulse Output Interrupts
7-2-2
140
Interrupt Functions
Overview
Interrupt Priority
Note
The Motion Control Modules support the following interrupts.
The programming routines that are executed for all of the following interrupts
are programmed as interrupt tasks.
Inputs to the Motion Control Module’s built-in contact inputs 0 to 3 can be set
as interrupt inputs. If they are set as interrupt inputs, an interrupt will be gen-
erated when the input turns ON, OFF, or both. If they are set for Counter
Mode, an interrupt will be generated when a specified counter value is
reached.
An interrupt will be generated for an interval timer that can be set to a preci-
sion of 0.1 ms. Interval timer interrupts can also be used in the Coordinator
Module.
An interrupt will be generated when the PV of the counter equals a preset tar-
get value.
An interrupt will be generated when the PV of the pulse output (or the pulse
counter’s PV/measured time) equals a preset target value.
In addition to interrupts, bit patterns can be output internally when the PV is
within a specified range in Range Comparison Mode. High-speed counter
PVs, pulse output PVs, pulse counter timer PVs, and one-shot pulse elapsed
times can be used as the PVs for bit pattern output.
A specified interrupt task will be executed when an interrupt is generated. The
priority of interrupts is shown below.
If an additional interrupt occurs while another interrupt is already being pro-
cessed, the new interrupt will be executed after the first interrupt task has
been completed.
If two or more interrupts occur simultaneously, the higher-priority interrupt will
be executed first. Interrupts have the following priority:
An instruction controlling a port operation cannot be programmed in an inter-
rupt task if an instruction in the main program is already controlling pulse I/O
or a high-speed counter for the same port. If this is attempted, the ER Flag will
turn ON. The following instructions are included: INI(880), PRV(881),
CTBL(882), SPED(885), PULS(886), PLS2(887), ACC(888), and STIM(980).
• Input interrupt 0 → Input interrupt 1 → Input interrupt 2 → Input interrupt 3
• Interval timer interrupt → Pulse output 1 interrupt → Pulse output 2 inter-
rupt → High-speed counter 1 interrupt → High-speed counter 2 interrupt
Section 7-2