F515C8EMCAXP Infineon Technologies, F515C8EMCAXP Datasheet - Page 80

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F515C8EMCAXP

Manufacturer Part Number
F515C8EMCAXP
Description
8 BIT OTP
Manufacturer
Infineon Technologies
Datasheet

Specifications of F515C8EMCAXP

Cpu Family
C500
Device Core
8051
Device Core Size
8b
Frequency (max)
10MHz
Interface Type
CAN/SPI/USART
Program Memory Type
EPROM
Program Memory Size
64KB
Total Internal Ram Size
2.25KB
# I/os (max)
49
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.25V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
MQFP
Lead Free Status / Rohs Status
Compliant
AC Characteristics (Operating Conditions apply)
(
Program Memory Characteristics
Parameter
ALE pulse width
Address setup to ALE
Address hold after ALE
ALE to valid instruction
in
ALE to PSEN
PSEN pulse width
PSEN to valid
instruction in
Input instruction hold
after PSEN
Input instruction float
after PSEN
Address valid after
PSEN
Address to valid
instruction in
Address float to PSEN
1)
Data Sheet
C
L
Interfacing the C515C to devices with float times up to 35 ns is permissible. This limited bus contention will not
cause any damage to port 0 drivers.
for port 0, ALE and PSEN outputs = 100 pF;
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
PXAV
AVIV
AZPL
1)
1)
min.
60
15
15
20
115
0
35
0
10-MHz Clock
Duty Cycle
0.4 to 0.6
76
max.
113
75
30
180
C
L
Limit Values
min.
CLP - 40
TCL
TCL
TCL
CLP +
TCL
0
TCL
0
for all other outputs = 80 pF)
Hmin
Hmin
Lmin
Hmin
Lmin
Variable Clock
1/CLP = 2 MHz
to 10 MHz
- 20 –
- 5
- 25 –
- 25 –
- 30
max.
2 CLP - 87
CLP +
TCL
TCL
2 CLP +
TCL
Hmin
Lmin
Hmin
- 10 ns
- 65
- 60
C515C
2003-02
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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