F515C8EMCAXP Infineon Technologies, F515C8EMCAXP Datasheet - Page 24

• Manufacturer Part Number: F515C8EMCAXP
• Description: 8 BIT OTP
• Manufacturer: Infineon Technologies

Specifications of F515C8EMCAXP

• Cpu Family: C500
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 10MHz
• Interface Type: CAN/SPI/USART
• Program Memory Type: EPROM
• Program Memory Size: 64KB
• Total Internal Ram Size: 2.25KB
• # I/os (max): 49
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.25V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: MQFP
• Lead Free Status / Rohs Status: Compliant

C515C
Reset and System Clock
The reset input is an active low input at pin RESET. Since the reset is synchronized
internally, the RESET pin must be held low for at least two machine cycles (12 oscillator
V
periods) while the oscillator is running. A pullup resistor is internally connected to
to
DD
allow a power-up reset with an external capacitor only. An automatic reset can be
V
V
obtained when
is applied by connecting the RESET pin to
via a capacitor.
DD
SS
Figure 6
shows the possible reset circuitries.
a)
b)
&
+
RESET
RESET
C515C
C515C
c)
+
RESET
C515C
MCS02721
Figure 6
Reset Circuitries
Figure 7
shows the recommended oscillator circiutries for crystal and external clock
operation.
Data Sheet
20
2003-02