F515C8EMCAXP Infineon Technologies, F515C8EMCAXP Datasheet - Page 72

• Manufacturer Part Number: F515C8EMCAXP
• Description: 8 BIT OTP
• Manufacturer: Infineon Technologies

Specifications of F515C8EMCAXP

• Cpu Family: C500
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 10MHz
• Interface Type: CAN/SPI/USART
• Program Memory Type: EPROM
• Program Memory Size: 64KB
• Total Internal Ram Size: 2.25KB
• # I/os (max): 49
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.25V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: MQFP
• Lead Free Status / Rohs Status: Compliant

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Data Sheet
Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the
and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these
pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading > 100 pF), the noise
pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a Schmitt-trigger,
or use an address latch with a Schmitt-trigger strobe input.
Capacitive loading on ports 0 and 2 may cause the
0.9
Overload conditions under operating conditions occur if the voltage on the respective pin exceeds the specified
operating range (i.e.
all port pins may not exceed 50 mA. The supply voltage (
Not 100% tested, guaranteed by design characterization.
V
DD
specification when the address lines are stabilizing.
V
OV
>
V
DD
+ 0.5 V or
V
OV
<
V
SS
68
- 0.5 V). The absolute sum of input overload currents on
V
OH
V
DD
on ALE and PSEN to momentarily fall below the
and
V
SS
) must remain within the specified limits.
V
C515C
OL
2003-02
of ALE