F515C8EMCAXP Infineon Technologies, F515C8EMCAXP Datasheet - Page 49

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F515C8EMCAXP

Manufacturer Part Number
F515C8EMCAXP
Description
8 BIT OTP
Manufacturer
Infineon Technologies
Datasheet

Specifications of F515C8EMCAXP

Cpu Family
C500
Device Core
8051
Device Core Size
8b
Frequency (max)
10MHz
Interface Type
CAN/SPI/USART
Program Memory Type
EPROM
Program Memory Size
64KB
Total Internal Ram Size
2.25KB
# I/os (max)
49
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.25V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
MQFP
Lead Free Status / Rohs Status
Compliant
10-Bit A/D Converter
The C515C includes a high performance / high speed 10-bit A/D-Converter (ADC) with
8 analog input channels. It operates with a successive approximation technique and
uses self calibration mechanisms for reduction and compensation of offset and linearity
errors. The A/D converter provides the following features:
• 8 multiplexed input channels (port 6), which can also be used as digital inputs
• 10-bit resolution
• Single or continuous conversion mode
• Internal or external start-of-conversion trigger capability
• Interrupt request generation after each conversion
• Using successive approximation conversion technique via a capacitor array
• Built-in hidden calibration of offset and linearity errors
The main functional blocks of the A/D converter are shown in
The A/D converter uses basically two clock signals for operation: the input clock
(= 1/
the C515C system clock
equal to
therefore must be adapted to
table in
which must be selected for typical system clock rates.
Data Sheet
t
IN
) and the conversion clock
Figure 18
f
OSC
. The conversion clock is limited to a maximum frequency of 2 MHz and
shows the prescaler ratios and the resulting A/D conversion times
f
OSC
f
OSC
which is applied at the XTAL pins. The input clock
f
ADC
by programming the conversion clock prescaler. The
(= 1/
45
t
ADC
). These clock signals are derived from
Figure
19.
C515C
2003-02
f
IN
f
IN
is

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