STM32W108HBU64TR STMicroelectronics, STM32W108HBU64TR Datasheet - Page 97
STM32W108HBU64TR
Manufacturer Part Number
STM32W108HBU64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108B-KEXT.pdf
(209 pages)
Specifications of STM32W108HBU64TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32W108HBU64TR
Manufacturer:
TDK
Quantity:
30 000
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STM32W108CB, STM32W108HB
9.12.3
9.12.4
31
15
31
30
14
30
Bits [15:0] SC_UARTPER: The integer part of baud rate period (N) in the equation:
UART baud rate period register (SC1_UARTPER)
Address offset: 0xC868
Reset value:
UART baud rate fractional period register (SC1_UARTFRAC)
Address offset: 0xC86C
Reset value:
Bit 6 SC_UARTAUTO: Set this bit to enable automatic nRTS control by hardware (SC_UARTFLOW
Bit 5 SC_UARTFLOW: Set this bit to enable using nRTS/nCTS flow control signals. Clear this bit to
Bit 4 SC_UARTODD: If parity is enabled, specifies the kind of parity.
Bit 3 SC_UARTPAR: Specifies whether to use parity bits.
Bit 2 SC_UART2STP: Number of stop bits transmitted.
Bit 1 SC_UART8BIT: Number of data bits.
Bit 0 SC_UARTRTS: nRTS is an output to control the flow of serial data sent to the STM32W108
29
13
29
must also be set). When automatic control is enabled, nRTS will be deasserted when the
receive FIFO has space for only one more byte (inhibits transmission from the other device)
and will be asserted if it has space for more than one byte (enables transmission from the other
device). The SC_UARTRTS bit in this register has no effect if this bit is set.
disable the signals. When this bit is clear, the UART transmitter will not be inhibited by nCTS.
0: Even parity.
0: Don't use parity.
0: 1 stop bit.
0: 7 data bits.
from another device. This bit directly controls the output at the nRTS pin (SC_UARTFLOW must
be set and SC_UARTAUTO must be cleared). When this bit is set, nRTS is asserted (pin is low,
'XON', RS232 positive voltage); the other device's transmission is enabled. When this bit is
cleared, nRTS is deasserted (pin is high, 'XOFF', RS232 negative voltage), the other device's
transmission is inhibited.
Rate = 24 MHz / ( (2 * N) + F )
28
12
28
27
11
27
0x0000 0000
0x0000 0000
26
10
26
25
25
9
1: Odd parity.
1: Use parity.
1: 2 stop bits.
1: 8 data bits.
Doc ID 16252 Rev 8
24
SC_UARTPER
24
8
Reserved
Reserved
rw
23
23
7
22
22
6
21
21
5
20
20
4
19
19
3
Serial interfaces
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