STM32W108HBU64TR STMicroelectronics, STM32W108HBU64TR Datasheet - Page 165

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STM32W108HBU64TR

Manufacturer Part Number
STM32W108HBU64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32W108HBU64TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
STM32W108CB, STM32W108HB
11.3.2
31
15
Bits [15:13] ADC_PERIOD: ADC sample time in clocks and the equivalent significant bits in the conversion.
30
14
Bits [10:7] ADC_MUXP: Input selection for the P channel.
Bits [15:0] ADC_OFFSET_FIELD: 16-bit signed offset added to the basic ADC conversion result before
Bits [6:3] ADC_MUXN: Input selection for the N channel.
Bit 12 ADC_HVSELP: Select voltage range for the P input channel.
Bit 11 ADC_HVSELN: Select voltage range for the N input channel.
ADC offset register (ADC_OFFSET)
Address offset: 0xD008
Reset value:
Bit 2 ADC_1MHZCLK: Select ADC clock:
Bit 1 Reserved: this bit must always be set to 0.
Bit 0 ADC_ENABLE: Enable the ADC: write 1 to enable continuous conversions, write 0 to stop.
29
13
0: 32 clocks (5 bits).4: 512 clocks (9 bits).
1: 64 clocks (6 bits).5: 1024 clocks (10 bits).
2: 128 clocks (7 bits).6: 2048 clocks (11 bits).
3: 256 clocks (8 bits).7: 4096 clocks (12 bits).
0: Low voltage range (input buffer disabled).
1: High voltage range (input buffer enabled).
0: Low voltage range (input buffer disabled).
1: High voltage range (input buffer enabled).
0x0: PB5 pin.
0x1: PB6 pin.
0x2: PB7 pin.
0x3: PC1 pin.
0x4: PA4 pin.
0x5: PA5 pin.
Refer to ADC_MUXP above for choices.
0: 6 MHz1: 1 MHz.
When the ADC is started the first conversion takes twice the usual number of clocks plus 21
microseconds. If anything in this register is modified while the ADC is running, the next
conversion takes twice the usual number of clocks.
gain correction is applied.
28
12
27
11
0x0000 0000
26
10
25
9
Doc ID 16252 Rev 8
ADC_OFFSET_FIELD
24
8
Reserved
rw
23
7
0x8: GND (0V) (not for high voltage range).
0x9: VREF/2 (0.6V).
0xA: VREF (1.2V).
0xB: VREG/2 (0.9V) (not for high voltage range).
0x6, 0x7, 0xC-0xF: Reserved.
22
6
21
5
20
4
Analog-to-digital converter
19
3
18
2
17
1
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16
0

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