PIC32MX675F512L-80V/BG Microchip Technology, PIC32MX675F512L-80V/BG Datasheet - Page 77
![512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX675F512L-80V/BG
Manufacturer Part Number
PIC32MX675F512L-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-10:
Legend:
Note
3000 OC1CON
3010
3020
3200 OC2CON
3210
3220
3400 OC3CON
3410
3420
3600 OC4CON
3610
3620
3800 OC5CON
3810
3820
1:
OC1RS
OC2RS
OC3RS
OC4RS
OC5RS
OC1R
OC2R
OC3R
OC4R
OC5R
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
OUTPUT COMPARE 1-OUTPUT COMPARE 5 REGISTER MAP
31/15
ON
ON
ON
ON
ON
—
—
—
—
—
30/14
FRZ
FRZ
FRZ
FRZ
FRZ
—
—
—
—
—
29/13
SIDL
SIDL
SIDL
SIDL
SIDL
—
—
—
—
—
28/12
—
—
—
—
—
—
—
—
—
—
27/11
—
—
—
—
—
—
—
—
—
—
26/10
—
—
—
—
—
—
—
—
—
—
25/9
—
—
—
—
—
—
—
—
—
—
24/8
OC1RS<31:0>
OC2RS<31:0>
OC3RS<31:0>
OC4RS<31:0>
OC5RS<31:0>
—
—
—
—
—
—
—
—
—
—
OC1R<31:0>
OC2R<31:0>
OC3R<31:0>
OC4R<31:0>
OC5R<31:0>
Bits
(1)
23/7
—
—
—
—
—
—
—
—
—
—
22/6
—
—
—
—
—
—
—
—
—
—
OC32
OC32
OC32
OC32
OC32
21/5
—
—
—
—
—
OCFLT
OCFLT
OCFLT
OCFLT
OCFLT
20/4
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
OCTSEL
OCTSEL
OCTSEL
OCTSEL
OCTSEL
19/3
—
—
—
—
—
18/2
—
—
—
—
—
OCM<2:0>
OCM<2:0>
OCM<2:0>
OCM<2:0>
OCM<2:0>
17/1
—
—
—
—
—
for more
16/0
—
—
—
—
—
0000
0000
xxxx
xxxx
xxxx
xxxx
0000
0000
xxxx
xxxx
xxxx
xxxx
0000
0000
xxxx
xxxx
xxxx
xxxx
0000
0000
xxxx
xxxx
xxxx
xxxx
0000
0000
xxxx
xxxx
xxxx
xxxx
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