PIC32MX675F512L-80V/BG Microchip Technology, PIC32MX675F512L-80V/BG Datasheet - Page 76
![512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX675F512L-80V/BG
Manufacturer Part Number
PIC32MX675F512L-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (6Mb)
TABLE 4-9:
Legend:
Note
2000 IC1CON
2010
2200 IC2CON
2210
2400 IC3CON
2410
2600 IC4CON
2610
2800 IC5CON
2810
1:
IC1BUF
IC2BUF
IC3BUF
IC4BUF
IC5BUF
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
(1)
(1)
(1)
(1)
(1)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INPUT CAPTURE 1-INPUT CAPTURE 5 REGISTER MAP
31/15
ON
ON
ON
ON
ON
—
—
—
—
—
30/14
FRZ
FRZ
FRZ
FRZ
FRZ
—
—
—
—
—
29/13
SIDL
SIDL
SIDL
SIDL
SIDL
—
—
—
—
—
28/12
—
—
—
—
—
—
—
—
—
—
27/11
—
—
—
—
—
—
—
—
—
—
26/10
—
—
—
—
—
—
—
—
—
—
FEDGE
FEDGE
FEDGE
FEDGE
FEDGE
25/9
—
—
—
—
—
24/8
C32
IC1BUF<31:0>
C32
IC2BUF<31:0>
C32
IC3BUF<31:0>
C32
IC4BUF<31:0>
C32
IC5BUF<31:0>
—
—
—
—
—
Bits
ICTMR
ICTMR
ICTMR
ICTMR
ICTMR
23/7
—
—
—
—
—
22/6
—
—
—
—
—
ICI<1:0>
ICI<1:0>
ICI<1:0>
ICI<1:0>
ICI<1:0>
Section 12.1.1 “CLR, SET and INV Registers”
21/5
—
—
—
—
—
ICOV
ICOV
ICOV
ICOV
ICOV
20/4
—
—
—
—
—
ICBNE
ICBNE
ICBNE
ICBNE
ICBNE
19/3
—
—
—
—
—
18/2
—
—
—
—
—
for more information.
ICM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
17/1
—
—
—
—
—
16/0
—
—
—
—
—
0000
0000
xxxx
xxxx
0000
0000
xxxx
xxxx
0000
0000
xxxx
xxxx
0000
0000
xxxx
xxxx
0000
0000
xxxx
xxxx
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