PIC32MX675F512L-80V/BG Microchip Technology, PIC32MX675F512L-80V/BG Datasheet - Page 170
![512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX675F512L-80V/BG
Manufacturer Part Number
PIC32MX675F512L-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 170 of 256
- Download datasheet (6Mb)
PIC32MX5XX/6XX/7XX
REGISTER 28-3:
DS61156G-page 170
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-19 Reserved: Write ‘ 1 ’
bit 18-16 FPLLODIV<2:0>: Default Postscaler for PLL bits
bit 15
bit 14-11 Reserved: Write ‘ 1 ’
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
Range
31:24
23:16
15:8
7:0
Bit
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
UPLLEN: USB PLL Enable bit
1 = Disable and bypass USB PLL
0 = Enable USB PLL
UPLLIDIV<2:0>: PLL Input Divider bits
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
Reserved: Write ‘ 1 ’
FPLLMUL<2:0>: PLL Multiplier bits
111 = 24x multiplier
110 = 21x multiplier
101 = 20x multiplier
100 = 19x multiplier
011 = 18x multiplier
010 = 17x multiplier
001 = 16x multiplier
000 = 15x multiplier
Reserved: Write ‘ 1 ’
FPLLIDIV<2:0>: PLL Input Divider bits
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
31/23/15/7
UPLLEN
Bit
R/P
r-1
—
r-1
—
r-1
—
DEVCFG2: DEVICE CONFIGURATION WORD 2
30/22/14/6
R/P-1
Bit
r-1
—
r-1
—
r-1
—
FPLLMUL<2:0>
W = Writable bit
‘1’ = Bit is set
29/21/13/5
Bit
R/P
—
—
—
r-1
r-1
r-1
28/20/12/4
R/P-1
Bit
r-1
—
r-1
—
r-1
—
P = Programmable bit
‘0’ = Bit is cleared
27/19/11/3
Bit
r-1
—
r-1
—
r-1
—
r-1
—
26/18/10/2
© 2009-2011 Microchip Technology Inc.
Bit
R/P
R/P
R/P
r-1
—
FPLLODIV<2:0>
UPLLIDIV<2:0>
FPLLIDIV<2:0>
r = Reserved bit
x = Bit is unknown
25/17/9/1
Bit
R/P
R/P
R/P
—
r-1
24/16/8/0
Bit
R/P
R/P
R/P
r-1
—
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