PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 30

• Manufacturer Part Number: PIC16F872-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F872-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F872
3.8
The PIC16F872 has two code protect mechanisms,
one bit for EEPROM Data memory and two bits for
FLASH Program memory. Data can be read and written
to the EEPROM Data memory regardless of the state
of the code protection bit, CPD. When code protection
is enabled, CPD cleared, external access via ICSP is
disabled regardless of the state of the program memory
code protect bits. This prevents the contents of
EEPROM Data memory from being read out of the
device.
The state of the program memory code protect bits,
CP0 and CP1, do not affect the execution of instruc-
tions out of program memory. The PIC16F872 can
always read the values in program memory, regardless
of the state of the code protect bits. However, the state
of the code protect bits and the WRT bit will have differ-
TABLE 3-1:
TABLE 3-2:
DS30221C-page 28
0Bh, 8Bh,
10Bh, 18Bh
10Dh
10Fh
10Ch
10Eh
18Ch
18Dh
8Dh
0Dh
Legend:
Note 1: These bits are reserved; always maintain these bits clear.
Address
CP1
0
0
1
1
Configuration Bits
Operation While Code Protected
Shaded cells are not used during FLASH/EEPROM access.
x = unknown, u = unchanged, r = reserved, - = unimplemented, read as '0'.
INTCON
EEADR
EEADRH
EEDATA
EEDATH
EECON1
EECON2 EEPROM Control Register2 (not a physical register)
PIE2
PIR2
CP0
Name
0
0
1
1
READ/WRITE STATE OF INTERNAL FLASH PROGRAM MEMORY
REGISTERS ASSOCIATED WITH DATA EEPROM/PROGRAM FLASH
EEPROM Address Register, Low Byte
EEPROM Data Register, Low Byte
EEPGD
Bit 7
WRT
GIE
—
—
—
—
0
1
0
1
PEIE
Bit 6
(1)
(1)
—
—
—
All program memory
All program memory
All program memory
All program memory
Memory Location
EEPROM Data Register, High Byte
TMR0IE
Bit 5
—
—
—
—
EEPROM Address, High Byte
INTE
EEIE
Bit 4
EEIF
—
WRERR
BCLIE
BCLIF
RBIE
Bit 3
ent effects on writing to program memory. Table 4-1
shows the effect of the code protect bits and the WRT
bit on program memory.
Once code protection has been enabled for either
EEPROM Data memory or FLASH Program memory,
only a full erase of the entire device will disable code
protection.
3.9
The configuration word contains a bit that write protects
the FLASH Program memory called WRT. This bit can
only be accessed when programming the device via
ICSP. Once write protection is enabled, only an erase
of the entire device will disable it. When enabled, write
protection prevents any writes to FLASH Program
memory. Write protection does not affect program
memory reads.
Internal
Read
TMR0IF
WREN
Yes
Yes
Yes
Yes
Bit 2
—
—
FLASH Program Memory Write
Protection
Bit 1
INTF
WR
—
—
Internal
Write
Yes
Yes
No
No
RBIF
Bit 0
RD
© 2006 Microchip Technology Inc.
(1)
(1)
ICSP Read
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
x--- x000 x--- u000
-r-0 0--r -r-0 0--r
-r-0 0--r -r-0 0--r
Value on:
Yes
Yes
POR,
No
No
BOR
—
ICSP Write
Value on
RESETS
all other
Yes
Yes
No
No
—