PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 163

• Manufacturer Part Number: PIC16F872-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F872-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

RESET ........................................................................ 87
RESET
Revision History ............................................................... 155
RSEN Bit
S
S Bit
Sample Bit (SMP) .............................................................. 52
SCK Pin ............................................................................. 55
SCL Pin .............................................................................. 58
SDA Pin ............................................................................. 58
SDI Pin ............................................................................... 55
SDO Pin ............................................................................. 55
SEN Bit
Serial Clock (SCK) ............................................................. 55
Serial Clock (SCL) ............................................................. 58
Serial Data Address (SDA) ................................................ 58
Serial Data In (SDI) ............................................................ 55
Serial Data Out (SDO) ....................................................... 55
Slave Select (SS) ............................................................... 55
SLEEP ................................................................87
SMP Bit .............................................................................. 52
Software Simulator (MPLAB SIM) ................................... 112
Special Features of the CPU ............................................. 87
Special Function Registers (SFRs) ...................................... 9
Speed, Operating ................................................................. 1
SPI Clock Edge Select Bit (CKE) ....................................... 52
SPI Mode
SS Pin ................................................................................ 55
SSBUF Register .................................................................. 9
MSSP
SSPADD Register .............................................................. 10
SSPBUF register ............................................................... 58
SSPCON Register ............................................................... 9
SSPCON2 Register ........................................................... 10
SSPEN Bit ......................................................................... 53
SSPIF ......................................................................... 16
SSPM3:SSPM0 Bits .......................................................... 53
SSPOV Bit .................................................................. 53
SSPOV Status Flag ........................................................... 69
SSPSTAT Register ..................................................... 10
Stack .................................................................................. 20
© 2006 Microchip Technology Inc.
RESET Conditions for All Registers .......................... 93
RESET Conditions for PCON Register ...................... 93
RESET Conditions for Program Counter ................... 93
RESET Conditions for Special Registers .................. 93
RESET Conditions for STATUS Register .................. 93
Brown-out Reset (BOR). See Brown-out Reset (BOR)
MCLR Reset. See MCLR
Power-on Reset (POR). See Power-on Reset (POR)
WDT Reset. See Watchdog Timer (WDT)
Repeated START Condition Enabled Bit (RSEN) ..... 54
START Bit (S) ............................................................ 52
START Condition Enabled Bit (SEN) ........................ 54
Data EEPROM and FLASH Program Memory .......... 23
Associated Registers ................................................. 57
Master Mode .............................................................. 56
Serial Clock ............................................................... 55
Serial Data In ............................................................. 55
Serial Data Out .......................................................... 55
Slave Select ............................................................... 55
SPI Clock ................................................................... 56
See also I
Overflows ................................................................... 20
Underflow .................................................................. 20
2
C Mode and SPI Mode.
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91
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100
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59
59
58
STATUS Register ..........................................................9
Synchronous Serial Port Enable Bit (SSPEN) ................... 53
Synchronous Serial Port Interrupt ..................................... 16
Synchronous Serial Port Mode Select Bits
T
T1CKPS0 bit ...................................................................... 39
T1CKPS1 bit ...................................................................... 39
T1CON Register .................................................................. 9
T1OSCEN bit ..................................................................... 39
T1SYNC bit ....................................................................... 39
T2CON Register .................................................................. 9
Time-out Sequence ........................................................... 92
Timer0 ............................................................................... 35
Timer1 ............................................................................... 39
Timer2 ............................................................................... 43
Timing Diagrams
C Bit .......................................................................... 12
DC Bit ........................................................................ 12
IRP Bit ....................................................................... 12
PD Bit ..................................................................12
RP1:RP0 Bits ............................................................ 12
TO Bit ..................................................................12
Z Bit ........................................................................... 12
(SSPM3:SSPM0) ...................................................... 53
Associated Registers ................................................ 37
External Clock ........................................................... 36
Interrupt ..................................................................... 35
Overflow Flag (TMR0IF Bit) ...................................... 98
Overflow Interrupt ...................................................... 98
Prescaler ................................................................... 36
T0CKI ........................................................................ 36
Associated Registers ................................................ 42
Asynchronous Counter Mode .................................... 41
Counter Operation ..................................................... 40
Operation in Timer Mode .......................................... 40
Oscillator ................................................................... 41
Prescaler ................................................................... 41
Reading and Writing in Asynchronous
Resetting of Timer1 Registers ................................... 41
Resetting Timer1 using a CCP Trigger Output ......... 41
Synchronized Counter Mode ..................................... 40
Associated Registers ................................................ 44
Output ....................................................................... 44
Postscaler ................................................................. 43
Prescaler ................................................................... 43
Prescaler and Postscaler .......................................... 44
A/D Conversion ....................................................... 137
Acknowledge Sequence ............................................ 71
Baud Rate Generator with Clock Arbitration ............. 65
BRG Reset Due to SDA Collision During
Brown-out Reset ..................................................... 129
Bus Collision
Bus Collision During a Repeated START
Bus Collision During a Repeated START
Bus Collision During a STOP Condition
Bus Collision During a STOP Condition
Capacitor Selection ........................................... 41
Transmit and Acknowledge ............................... 73
Counter Mode ........................................... 41
START Condition ...................................... 75
Condition (Case 1) .................................... 76
Condition (Case2) ..................................... 76
(Case 1) .................................................... 77
(Case 2) .................................................... 77
PIC16F872
DS30221C-page 161
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