PIC16F1933-I/SP Microchip Technology Inc., PIC16F1933-I/SP Datasheet - Page 78

• Manufacturer Part Number: PIC16F1933-I/SP
• Description: 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1933-I/SP

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F193X/LF193X
5.4
Two-Speed Start-up mode provides additional power
savings by minimizing the latency between external
oscillator start-up and code execution. In applications
that make heavy use of the Sleep mode, Two-Speed
Start-up will remove the external oscillator start-up
time from the time spent awake and can reduce the
overall power consumption of the device. This mode
allows the application to wake-up from Sleep, perform
a few instructions using the INTOSC internal oscillator
block as the clock source and go back to Sleep without
waiting for the external oscillator to become stable.
Two-Speed Start-up provides benefits when the oscil-
lator module is configured for LP, XT, or HS modes.
The Oscillator Start-up Timer (OST) is enabled for
these modes and must count 1024 oscillations before
the oscillator can be used as the system clock source.
If the oscillator module is configured for any mode
other than LP, XT or HS mode, then Two-Speed
Start-up is disabled. This is because the external clock
oscillator does not require any stabilization time after
POR or an exit from Sleep.
If the OST count reaches 1024 before the device
enters Sleep mode, the OSTS bit of the OSCSTAT reg-
ister is set and program execution switches to the
external oscillator. However, the system may never
operate from the external oscillator if the time spent
awake is very short.
TABLE 5-1:
DS41364D-page 78
Switch From
Sleep/POR
Sleep/POR
LFINTOSC
Sleep/POR
Any clock source
Any clock source
Any clock source
PLL inactive
Note 1:
Note:
Two-Speed Clock Start-up Mode
PLL inactive.
Executing a SLEEP instruction will abort
the oscillator start-up time and will cause
the OSTS bit of the OSCSTAT register to
remain clear.
OSCILLATOR SWITCHING DELAYS
EC, RC
Switch To
LFINTOSC
MFINTOSC
HFINTOSC
EC, RC
Timer1 Oscillator
LP, XT, HS
MFINTOSC
HFINTOSC
LFINTOSC
Timer1 Oscillator
PLL active
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Preliminary
Frequency
31 kHz
31.25 kHz-500 kHz
31.25 kHz-16 MHz
DC – 32 MHz
DC – 32 MHz
32 kHz-20 MHz
31.25 kHz-500 kHz
31.25 kHz-16 MHz
31 kHz
32 kHz
16-32 MHz
5.4.1
Two-Speed Start-up mode is configured by the
following settings:
• IESO (of the Configuration Word 1) = 1; Inter-
• SCS (of the OSCCON register) = 00.
• FOSC<2:0> bits in the Configuration Word 1
Two-Speed Start-up mode is entered after:
• Power-on Reset (POR) and, if enabled, after
• Wake-up from Sleep.
nal/External Switchover bit (Two-Speed Start-up
mode enabled).
configured for LP, XT or HS mode.
Power-up Timer (PWRT) has expired, or
TWO-SPEED START-UP MODE
CONFIGURATION
Oscillator Delay
Oscillator Warm-up Delay (T
2 cycles
1 cycle of each
1024 Clock Cycles (OST)
2 s (approx.)
1 cycle of each
1024 Clock Cycles (OST)
2 ms (approx.)
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