PIC16F1933-I/SP Microchip Technology Inc., PIC16F1933-I/SP Datasheet - Page 365

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PIC16F1933-I/SP

Manufacturer Part Number
PIC16F1933-I/SP
Description
7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1933-I/SP

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1933-I/SP
Manufacturer:
NXP
Quantity:
1 000
Part Number:
PIC16F1933-I/SP
Manufacturer:
MICROCHI
Quantity:
20 000
28.0
Each PIC16 instruction is a 14-bit word containing the
operation code (opcode) and all required operands.
The opcodes are broken into three broad categories.
• Byte Oriented
• Bit Oriented
• Literal and Control
The literal and control category contains the most var-
ied instruction word format.
Table 28-3 lists the instructions recognized by the
MPASM
All instructions are executed within a single instruction
cycle, with the following exceptions, which may take
two or three cycles:
• Subroutine takes two cycles (CALL, CALLW)
• Returns from interrupts or subroutines take two
• Program branching takes two cycles (GOTO, BRA,
• One additional instruction cycle will be used when
One instruction cycle consists of 4 oscillator cycles; for
an oscillator frequency of 4 MHz, this gives a nominal
instruction execution rate of 1 MHz.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
 2009 Microchip Technology Inc.
cycles (RETURN, RETLW, RETFIE)
BRW, BTFSS, BTFSC, DECFSZ, INCSFZ)
any instruction references an indirect file register
and the file select register is pointing to program
memory.
TM
INSTRUCTION SET SUMMARY
assembler.
Preliminary
28.1
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion, or the destination designator ‘d’. A read operation
is performed on a register even if the instruction writes
to that register.
TABLE 28-1:
TABLE 28-2:
Field
Field
PIC16F193X/LF193X
mm
DC
PC
TO
PD
W
C
b
d
n
Z
k
x
f
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (= 0 or 1).
The assembler will generate code with x = 0.
It is the recommended form of use for
compatibility with all Microchip software tools.
Destination select; d = 0: store result in
d = 1: store result in file register f.
Default is d = 1.
FSR or INDF number. (0-1)
Pre-post increment-decrement mode
selection
Program Counter
Time-out bit
Carry bit
Digit carry bit
Zero bit
Power-down bit
Read-Modify-Write Operations
OPCODE FIELD
DESCRIPTIONS
ABBREVIATION
DESCRIPTIONS
Description
Description
DS41364D-page 365
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