PIC16F1933-I/SP Microchip Technology Inc., PIC16F1933-I/SP Datasheet - Page 344

• Manufacturer Part Number: PIC16F1933-I/SP
• Description: 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1933-I/SP

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F193X/LF193X
26.9
LCD waveforms are generated so that the net AC
voltage across the dark pixel should be maximized and
the net AC voltage across the clear pixel should be
minimized. The net DC voltage across any pixel should
be zero.
The COM signal represents the time slice for each
common, while the SEG contains the pixel data.
The pixel signal (COM-SEG) will have no DC
component and it can take only one of the two RMS
values. The higher RMS value will create a dark pixel
and a lower RMS value will create a clear pixel.
As the number of commons increases, the delta
between the two RMS values decreases. The delta
represents the maximum contrast that the display can
have.
FIGURE 26-8:
DS41364D-page 344
COM0
LCD Waveform Generation
TYPE-A/TYPE-B WAVEFORMS IN STATIC DRIVE
segment voltage
segment voltage
COM0-SEG0
COM0-SEG1
COM0 pin
SEG0 pin
SEG1 pin
(inactive)
(active)
Preliminary
The LCDs can be driven by two types of waveform:
Type-A and Type-B. In Type-A waveform, the phase
changes within each common type, whereas in Type-B
waveform, the phase changes on each frame
boundary. Thus, Type-A waveform maintains 0 V
over a single frame, whereas Type-B waveform takes
two frames.
Figure 26-8 through Figure 26-18 provide waveforms
for static, half-multiplex, 1/3-multiplex and 1/4-multiplex
drives for Type-A and Type-B waveforms.
Note 1: If Sleep has to be executed with LCD
1 Frame
2: When the LCD clock source is F
Sleep disabled (LCDCON<SLPEN> is
‘1’), then care must be taken to execute
Sleep only when V
‘0’.
if Sleep is executed, irrespective of the
LCDCON<SLPEN> setting, the LCD
immediately goes into Sleep. Thus, take
care to see that V
when Sleep is executed.
 2009 Microchip Technology Inc.
DC
DC
on all the pixels is
on all pixels is ‘0’
OSC
V
V
V
V
V
V
V
V
-V
V
/256,
1
0
1
0
1
0
1
0
0
1
DC