PIC16F737-I/SP Microchip Technology Inc., PIC16F737-I/SP Datasheet - Page 188

• Manufacturer Part Number: PIC16F737-I/SP
• Description: 28 PIN, 7 KB FLASH, 368 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F737-I/SP

• A/d Inputs: 5-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F7X7
15.17 Watchdog Timer (WDT)
For PIC16F7X7 devices, the WDT has been modified
from previous PIC16 devices. The new WDT is code
and functionally backward compatible with previous
PIC16 WDT modules and allows the user to have a
scaler value for the WDT and TMR0 at the same time.
In addition, the WDT time-out value can be extended to
268 seconds, using the prescaler with the postscaler
when the PSA bit is set to ‘1’.
15.17.1
The WDT derives its time base from the 31.25 kHz
INTRC; therefore, the accuracy of the 31.25 kHz will be
the same accuracy for the WDT time-out period.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 16.38 ms which is
compatible with the time base generated with previous
PIC16 microcontroller versions.
FIGURE 15-12:
TABLE 15-5:
DS30498C-page 186
WDTEN = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTRC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Note:
INTRC Clock
31.25 kHz
WDT OSCILLATOR
When the OST is invoked, the WDT is held
in Reset because the WDT ripple counter
is used by the OST to perform the oscilla-
tor delay count. When the OST count has
expired, the WDT will begin counting (if
enabled).
PRESCALER/POSTSCALER BIT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
Conditions
16-bit Programmable Prescaler WDT
WDTEN from Configuration Word Register 1
SWDTEN from WDTCON Register
WDTPS<3:0>
From TMR0 Clock Source
Register 1 and when this bit is set, the WDT runs
continuously.
A new prescaler has been added to the path between
the internal RC and the multiplexors used to select the
path for the WDT. This prescaler is 16 bits and can be
programmed to divide the internal RC by 32 to 65536,
giving the time base used for the WDT a nominal range
of 1 ms to 2.097s.
15.17.2
The WDTEN bit is located in Configuration Word
The SWDTEN bit is in the WDTCON register. When the
WDTEN bit in the Configuration Word Register 1 is set,
the SWDTEN bit has no effect. If WDTEN is clear, then
the SWDTEN bit can be used to enable and disable the
WDT. Setting the bit will enable it and clearing the bit
will disable it.
The PSA and PS<2:0> bits (OPTION_REG) have the
same function as in previous versions of the PIC16
family of microcontrollers.
Cleared at end of OST
0
1
Prescaler
WDT CONTROL
Cleared
PSA
WDT Time-out
 2004 Microchip Technology Inc.
0
Postscaler
Cleared at end of OST
Postscaler (PSA = 1)
1
8
Cleared
PSA
PS<2:0>
To TMR0