PIC16F737-I/SP Microchip Technology Inc., PIC16F737-I/SP Datasheet - Page 156

• Manufacturer Part Number: PIC16F737-I/SP
• Description: 28 PIN, 7 KB FLASH, 368 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F737-I/SP

• A/d Inputs: 5-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F7X7
REGISTER 12-3:
The analog reference voltage is software selectable
to either the device’s positive and negative supply
voltage (V
RA3/AN3/V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
DS30498C-page 154
DD
REF
bit 7-6
bit 5-3
bit 2-0
and V
+ and RA2/AN2/V
SS
ADCON2: A/D CONTROL REGISTER 2 (ADDRESS 9Bh)
bit 7
Unimplemented: Read as ‘0’
ACQT<2:0>: A/D Acquisition Time Select bits
000 = 0
001 = 2 T
010 = 4 T
011 = 6 T
100 = 8 T
101 = 12T
110 = 16 T
111 = 20 T
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
) or the voltage level on the
Note 1: If the A/D clock source is selected as RC, a time of T
U-0
—
(1)
AD
AD
AD
AD
REF
AD
AD
AD
clock starts. This allows the SLEEP instruction to be executed.
-/CV
U-0
—
REF
pins.
ACQT2
R/W-0
W = Writable bit
‘1’ = Bit is set
ACQT1
R/W-0
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH/ADRESL
registers, the GO/DONE bit (ADCON0 register) is
cleared and A/D Interrupt Flag bit, ADIF, is set. The block
diagram of the A/D module is shown in Figure 12-1.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ACQT0
R/W-0
 2004 Microchip Technology Inc.
U-0
—
CY
is added before the A/D
x = Bit is unknown
U-0
—
U-0
—
bit 0