PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 263

• Manufacturer Part Number: PIC24FJ256DA210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256DA210-I/PT

• A/d Inputs: 24 Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART
• Memory Capacity: 256 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Leads: 100
• Number Of Pins: 100
• Package Type: 100-Pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 96K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Voltage, Rating: 2.2-3.6 V
• Run Mode: 800 μA/MIPS, 3.3 V Typical
• Standby Current With 32 Khz Oscillator: 22 μA, 3.3 V Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 18-13: U1CNFG2: USB CONFIGURATION REGISTER 2
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
U-0
—
—
Never change these bits while the USBPWR bit is set (U1PWRC<0> = 1).
Unimplemented: Read as ‘0’
UVCMPSEL: V
1 = Use V
0 = Use V
PUVBUS: V
1 = Pull-up on V
0 = Pull-up on V
EXTI2CEN: I
1 = External module(s) is controlled via the I
0 = External module(s) controlled via the dedicated pins
UVBUSDIS: On-Chip 5V Boost Regulator Builder Disable bit
1 = On-chip boost regulator builder is disabled; digital output control interface is enabled
0 = On-chip boost regulator builder is active
UVCMPDIS: On-Chip V
1 = On-chip charge V
0 = On-chip charge V
UTRDIS: On-Chip Transceiver Disable bit
1 = On-chip transceiver is disabled; digital transceiver interface is enabled
0 = On-chip transceiver is active
U-0
U-0
—
—
BUSVLD
CMPST
BUS
2
C™ Interface For External Module Control Enable bit
W = Writable bit
‘1’ = Bit is set
UVCMPSEL
BUS
Pull-Up Enable bit
BUS
BUS
1 and V
, SESSVLD and SESSEND as comparator interface pins
R/W-0
U-0
Comparator External Interface Selection bit
—
pin is enabled
pin is disabled
BUS
BUS
BUS
CMPST
comparator is disabled; digital input status interface is enabled
comparator is active
Comparator Disable bit
2 as comparator interface pins
PUVBUS
PIC24FJ256DA210 FAMILY
R/W-0
U-0
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
2
EXTI2CEN
C™ interface
R/W-0
U-0
—
(1)
UVBUSDIS
(1)
R/W-0
U-0
—
(1)
UVCMPDIS
x = Bit is unknown
R/W-0
U-0
—
DS39969B-page 263
(1)
UTRDIS
R/W-0
U-0
—
bit 8
bit 0
(1)