PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 21

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PIC24FJ256DA210-I/PT

Manufacturer Part Number
PIC24FJ256DA210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256DA210-I/PT

A/d Inputs
24 Channel, 10-Bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART
Memory Capacity
256 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Leads
100
Number Of Pins
100
Package Type
100-Pin TQFP
Programmable Memory
256K Bytes
Ram Size
96K Bytes
Speed
32 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Voltage, Rating
2.2-3.6 V
Run Mode
800 μA/MIPS, 3.3 V Typical
Standby Current With 32 Khz Oscillator
22 μA, 3.3 V Typical
Lead Free Status / Rohs Status
RoHS Compliant part

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PIC24FJ256DA210-I/PT
Quantity:
3
TABLE 1-3:
 2010 Microchip Technology Inc.
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AV
AV
C1INA
C1INB
C1INC
C1IND
C2INA
C2INB
C2INC
C2IND
C3INA
C3INB
C3INC
C3IND
CLKI
CLKO
Legend:
Note 1:
Function
DD
SS
2:
3:
4:
TTL = TTL input buffer
ANA = Analog level input/output
The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.
The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
The alternate V
TQFP/QFN
64-Pin
16
15
14
13
12
17
18
21
22
23
24
27
28
29
30
19
20
12
13
14
55
54
48
47
39
40
11
11
5
4
8
6
PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS
Pin Number
REF
100-Pin
TQFP
pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.
25
24
23
22
21
20
26
27
32
33
34
35
41
42
43
44
10
11
12
14
19
92
91
30
31
20
21
11
10
22
23
14
12
84
83
74
73
63
64
9
121-Pin
BGA
C10
B11
F11
G2
K2
K1
H2
H1
K4
K7
E1
E3
F4
F2
F3
B5
C5
H1
H2
F4
E3
F3
F2
C7
D7
F9
J2
J1
L1
J3
L4
L5
J5
J7
L7
L8
J4
L3
J1
J2
PIC24FJ256DA210 FAMILY
I/O
P
P
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Input
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ST
ST = Schmitt Trigger input buffer
I
2
C™ = I
A/D Analog Inputs.
Positive Supply for Analog modules.
Ground Reference for Analog modules.
Comparator 1 Input A.
Comparator 1 Input B.
Comparator 1 Input C.
Comparator 1 Input D.
Comparator 2 Input A.
Comparator 2 Input B.
Comparator 2 Input C.
Comparator 2 Input D.
Comparator 3 Input A.
Comparator 3 Input B.
Comparator 3 Input C.
Comparator 3 Input D.
Main Clock Input Connection.
System Clock Output.
2
C/SMBus input buffer
Description
DS39969B-page 21

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