DP83820BVUW National Semiconductor, DP83820BVUW Datasheet - Page 65

• Manufacturer Part Number: DP83820BVUW
• Description: IC INTERFACE CONTROLLER 208-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83820BVUW

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: IEEE 802.3
• Voltage - Supply: 3.3V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83820BVUW

4.0 Register Set
4.2.28 Transmit Descriptor Pointer 1 Register
This register points to the Transmit Descriptor for Priority Queue 1.
4.2.29 Transmit Descriptor Pointer 2 Register
This register points to the Transmit Descriptor for Priority Queue 2.
4.2.30 Transmit Descriptor Pointer 3 Register
This register points to the Transmit Descriptor for Priority Queue 3.
31-3
31-3
31-3
2-0
2-0
2-0
bit
bit
bit
TXDP1
TXDP2
TXDP3
tag
tag
tag
Offset: 00A0h
Offset: 00A4h
Offset: 00A8h
Transmit
Descriptor Pointer
1
Transmit
Descriptor Pointer
2
Transmit
Descriptor Pointer
3
(Continued)
Tag: TXDP1
Tag: TXDP2
Tag: TXDP3
description
description
description
The current value of the transmit descriptor pointer for Priority Queue 1. When initializing
the queue for a new transmission, software must set TXDP to the address of a completed
transmit descriptor. While the transmit state machine is active, TXDP will follow the state
machine as it advances through a linked list of active descriptors. If the link field of the
current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,
but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR
register will cause the transmit state machine to reread the link field of the current
descriptor to check for new descriptors that may have been appended to the end of the
list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory
(A2-A0 must be 0).
unused
The current value of the transmit descriptor pointer for Priority Queue 2. When initializing
the queue for a new transmission, software must set TXDP to the address of a completed
transmit descriptor. While the transmit state machine is active, TXDP will follow the state
machine as it advances through a linked list of active descriptors. If the link field of the
current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,
but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR
register will cause the transmit state machine to reread the link field of the current
descriptor to check for new descriptors that may have been appended to the end of the
list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory
(A2-A0 must be 0).
unused
The current value of the transmit descriptor pointer for Priority Queue 3. When initializing
the queue for a new transmission, software must set TXDP to the address of a completed
transmit descriptor. While the transmit state machine is active, TXDP will follow the state
machine as it advances through a linked list of active descriptors. If the link field of the
current transmit descriptor is NULL (signifying the end of the list), TXDP will not advance,
but will remain on the current descriptor. Any subsequent writes to the TXE bit of the CR
register will cause the transmit state machine to reread the link field of the current
descriptor to check for new descriptors that may have been appended to the end of the
list. Transmit descriptors must be aligned on an even 64-bit boundary in host memory
(A2-A0 must be 0).
unused
Access: Read Write
Access: Read Write
Access: Read Write
Size: 32 bits
Size: 32 bits
Size: 32 bits
65
usage
usage
usage
Hard Reset: 00000000h
Hard Reset: 00000000h
Hard Reset: 00000000h
Soft Reset: 00000000h
Soft Reset: 00000000h
Soft Reset: 00000000h
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