DP83820BVUW National Semiconductor, DP83820BVUW Datasheet - Page 35

• Manufacturer Part Number: DP83820BVUW
• Description: IC INTERFACE CONTROLLER 208-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83820BVUW

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: IEEE 802.3
• Voltage - Supply: 3.3V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83820BVUW

4.0 Register Set
4.1.5 Configuration IO Base Address Register
This register specifies the Base I/O address which is required to build an address map during configuration. It also
specifies the number of bytes required as well as an indication that it can be mapped into I/O space.
4.1.6 Configuration Memory Address Register
This register specifies the Base Memory address which is required to build an address map during configuration. It also
specifies the number of bytes required as well as an indication that it can be mapped into memory space.
4.1.7 Configuration Memory Address High Dword Register
This register specifies the upper 32-bits of the Base Memory address which is required to build an address map during
configuration.
31-12
11-4
31-0
31-8
2-1
bit
bit
7-2
bit
3
0
1
0
MEMBASE1
MEMBASE
MEMSIZE
MEMLOC
MEMIND
IOBASE
MEMPF
IOSIZE
IOIND
tag
tag
tag
Offset: 10h
Offset: 14h
Offset: 18h
(Continued)
Tag: CFGIOA
Tag: CFGMA
Tag: CFGMA1
Base IO Address
Unused
IO Space Indicator
Size indication
Memory Base Address
Memory Size
Prefetchable
Location Selection
Memory Space Indicator
Memory Base High Address
description
description
description
Access: Read Write
Access: Read Write
Access: Read Write
This is set by software to the base IO address for the Operational Register
Map.
Read back as 0. This allows the PCI bridge to determine that the DP83820
requires 256 bytes of IO space.
Unused (reads return 0).
Read Only. Set to 1 by DP83820 to indicate that DP83820 is capable of
being mapped into IO space.
This is set by software to the base address for the Operational Register
Map.
These bits return 0, which indicates that the DP83820 requires 4096 bytes
of Memory Space (the minimum recommended allocation).
Read Only. Set to 0 by DP83820.
Read Only. Set to 10 by DP83820 if target 64-bit addressing is enabled. Set
to 00 if 64-bit addressing is not enabled. 64-bit addressing capability is
loaded from EEPROM at power-up and is reflected in the CFG:T64ADDR
bit in operational register space.
Read Only. Set to 0 by DP83820 to indicate that DP83820 is capable of
being mapped into memory space.
This is set by software to the upper 32-bits of the base address for the
Operational Register Map. If 64-bit addressing is disabled then this field will
be read-only and always return 0.
Size: 32 bits
Size: 32 bits
Size: 32 bits
35
usage
usage
usage
Hard Reset: 00000001h
Hard Reset: 00000000h
Hard Reset: 00000000h
Soft Reset: Unchanged
Soft Reset: unchanged
Soft Reset: unchanged
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