DP83820BVUW National Semiconductor, DP83820BVUW Datasheet - Page 37

• Manufacturer Part Number: DP83820BVUW
• Description: IC INTERFACE CONTROLLER 208-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83820BVUW

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: IEEE 802.3
• Voltage - Supply: 3.3V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83820BVUW

4.0 Register Set
4.1.11 Configuration Interrupt Select Register
This register stores the interrupt line number as identified by the POST software that is connected to the interrupt
controller as well as DP83820 desired settings for maximum latency and minimum grant. Max latency and Min. latency
can be loaded from the EEPROM
4.1.12 Power Management Capabilities Register
This register provides information on the capabilities of the functions related to power management. This register also
contains a pointer to the next item in the capabilities list and the capability ID for Power Management. This register is only
visible if CFGCS[4] is set.
31-27
24-22
31-24
23-16
15-8
7-0
bit
26
25
21
bit
AUX_CURRENT 3 bit field for aux current
MNGNT
MXLAT
ILINE
PMES
IPIN
tag
D2S
D1S
DSI
tag
Offset: 3Ch
Offset: 40h
(Continued)
Tag: CFGINT
Tag: PMCAP
Maximum Latency
Minimum Grant
Interrupt Pin
Interrupt Line
PME Support
D2 Support
D1 Support
requirement.
Device Specific Initialization This bit is set to 1 to indicate to the system that initialization of the DP83820
description
description
Access: Read Write
Access: Read Only
The DP83820 desired setting for Max Latency. The DP83820 will initialize
this field to 52d (13 usec). The value in this register can be loaded from the
EEPROM.
The DP83820 desired setting for Minimum Grant. The DP83820 will
initialize this field to 11d (2.75 usec). The value in this register can be
loaded from the EEPROM.
Read Only, always return 0000 0001 (INTA)
Set to which line on the interrupt controller that the DP83820's interrupt pin
is connected to.
This 5 bit field indicates the power states in which DP83820 may assert
PMEN. A 1 indicates PMEN is enabled for that state, a 0 indicates PMEN is
inhibited in that state.
The DP83820 will only report PME support for D3cold if auxiliary power is
detected on the 3VAUX pin, in addition this value can be loaded from the
EEPROM when in the D3cold state.
This bit is set to a 1 when the DP83820 supports the D2 state.
This bit is set to a 1 when the DP83820 supports the D1 state.
Aux_Current - This 3 bit field reports the 3.3Vaux auxiliary current
requirements for the PCI function.
If PMEN generation from D3cold is not supported by the
function(PMCAP[31]), this field returns a value of “000b” when read.
device is required (beyond the standard PCI configuration header) before
the generic class device driver is able to use it. A 1 indicates that DP83820
requires a DSI sequence following transition to the D0 uninitialized state.
This bit can be loaded from the EEPROM.
Size: 32 bits
Size: 32 bits
XXXX1 - PMEN can be asserted from state D0
XXX1X - PMEN can be asserted from state D1
XX1XX - PMEN can be asserted from state D2
X1XXX - PMEN can be asserted from state D3hot
1XXXX - PMEN can be asserted from state D3cold
8 7 6
1 1 0
0 0 0
Bit
37
Max. Current Required
0 (self powered)
3.3Vaux
320 mA
usage
usage
Hard Reset: 340b0100h
Hard Reset: FF820001
Soft Reset: unchanged
Soft Reset: unchanged
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