DP83820BVUW National Semiconductor, DP83820BVUW Datasheet - Page 44

• Manufacturer Part Number: DP83820BVUW
• Description: IC INTERFACE CONTROLLER 208-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83820BVUW

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: IEEE 802.3
• Voltage - Supply: 3.3V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83820BVUW

4.0 Register Set
4.2.4 EEPROM Map
Registers for SOPAS[47:0] and PMATCH[47:0] can be accessed directly via the combination of the RFCR (offset 0048h)
and RFDR (offset 004Ch) registers as well as loaded from the EEPROM as noted here.
The lower 8 bits of the checksum value should be 55h. For the upper 8 bits, add the top 8 data bits to the lower 8 data bits
for each address. Sum the resultant 8 bit values for all addresses and then add 55h. Take the 2’s complement of the final
sum. This 2’s complement number should be the upper 8 bits of the checksum value in the last address.
As an example, consider an EEPROM with two addresses. EEPROM address 0000h contains the data 1234h. EEPROM
address 0001h contains the data 5678h.
12h + 34h = 46h
56h + 78h = CEh
46h + CEh + 55h = 69h
The 2’s complement of 69h is 97h so the checksum value entered into EEPROM address 0002h would be 9755h.
(Continued)
EEPROM
Address
000Ah
000Bh
000Ch
000Dh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
CFGSID[31:16]
CFGSID[15:0]
CFGINT[31:16]
4’h0,
2’h0, CFGCS[21], CFGCS[20],
2’h0, PMCAP[31], PMCAP[21],
3’h0, PMCSR[8]
6’h00, GPIOR[9:0]
6’h00, CFG[24:21], CFG[16:14], CFG[12:11], CFG[1]
CR[2], WCSR[10:9], WCSR[4:0],
1’h0, RFCR[31:27], RFCR[22], RFCR[19]
SOPAS[47:32]
SOPAS[31:16]
SOPAS[15:0]
PMATCH[47:32]
PMATCH[31:16]
PMATCH[15:0]
checksum value
Configuration/Operation Register Bits
44
Default Value
(16 bits)
340Bh
0000h
0000h
0220h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
N/A
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