CY7C63310-PXC Cypress Semiconductor Corp, CY7C63310-PXC Datasheet - Page 32

• Manufacturer Part Number: CY7C63310-PXC
• Description: IC USB PERIPHERAL CTRLR 16-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™IIr

Specifications of CY7C63310-PXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13. Low Voltage Detect Control
Table 13-1. Low Voltage Control Register (LVDCR) [0x1E3] [R/W]
Document 38-08035 Rev. *N
This register controls the configuration of the Power on Reset/Low voltage Detection block.
Note This register exists in the second bank of IO space. This requires setting the XIO bit in the CPU flags register.
Bit [7:6]: Reserved
Bit [5:4]: PORLEV[1:0]
This field controls the level below which the precision power on reset (PPOR) detector generates a reset.
0 0 = 2.7V Range (trip near 2.6V)
0 1 = 3V Range (trip near 2.9V)
1 0 = 5V Range, >4.75V (trip near 4.65V). This setting must be used when operating the CPU above 12 MHz.
1 1 = PPOR does not generate a reset, but values read from the Voltage Monitor Comparators Register
internal PPOR comparator state with trip point set to the 3V range setting.
Bit 3: Reserved
Bit [2:0]: VM[2:0]
000
001
010
011
100
101
110
111
Read/Write
VM[2:0]
Default
Field
Bit #
Reserved
Reserved
Reserved
Reserved
4.439
4.597
4.680
4.766
Point (V) Min
LVD Trip
7
–
0
Reserved
Reserved
Reserved
Reserved
Reserved
4.48
4.64
4.73
4.82
Point (V) Typ
LVD Trip
6
–
0
Point (V) Max
Reserved
Reserved
Reserved
Reserved
4.528
4.689
4.774
4.862
LVD Trip
R/W
5
0
PORLEV[1:0]
R/W
4
0
Reserved
3
–
0
CY7C63310, CY7C638xx
R/W
2
0
(Table
VM[2:0]
R/W
1
0
13-2) give the
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R/W
0
0
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