CY7C63310-PXC Cypress Semiconductor Corp, CY7C63310-PXC Datasheet - Page 19

• Manufacturer Part Number: CY7C63310-PXC
• Description: IC USB PERIPHERAL CTRLR 16-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™IIr

Specifications of CY7C63310-PXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The Silicon IDs for enCoRe II devices are stored in SROM tables in the part, as shown in
The Silicon ID can be read out from the part using SROM Table reads (Table 0). This is demonstrated in the following pseudo code.
As mentioned in the section
variables and their definition is given in the section
AREA SSCParmBlkA(RAM,ABS)
SSC_KEY1:
SSC_RETURNCODE:
SSC_KEY2 :
SSC_BLOCKID:
SSC_POINTER:
SSC_CLOCK:
SSC_MODE:
SSC_DELAY:
SSC_WRITE_ResultCode: blk 1 ; FFh
_main:
//Call SROM operation to read the SROM table
// At the end of the SSC command the silicon ID is stored in F8 (MSB) and F9(LSB) of the SRAM
.terminate:
Document 38-08035 Rev. *N
; load the supervisory code for flash operations
org
jmp .terminate
F8h // Variables are defined starting at address F8h
mov
mov
add
mov
mov
mov
SSC
mov
mov
X, SP
A, X
A, 3
[SSC_KEY2], A
[SSC_KEY1], 3Ah
A,6
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 0
A, 0
[SSC_BLOCKID], A// To read from Table 0 - Silicon ID is stored in Table 0
blk 1 ; F8h
blk 1
blk 1 ; FAh
blk 1 ; FBh
blk 1 ; FCh
blk 1 ; FDh
blk 1 ; FEh
SROM on page
Silicon ID
Family/
Die ID
F8h
[15-8]
; F8h
; load A with specific operation. 06h is the code for Table read
;F9h
; copy SP into X
; A temp stored in X
; SSC call the supervisory ROM
Revision
Silicon ID
F9h
[7-0]
15, the SROM variables occupy address F8h through FFh in the SRAM. Each of the
ID
supervisory key
result code
supervisory stack ptr key
block ID
pointer to data buffer
Clock
ClockW ClockE multiplier
flash macro sequence delay count
;flash_OPER_KEY - 3Ah
temporary result code
; create 3 byte stack frame (2 + pushed A)
; save stack frame for supervisory code
SROM on page
Figure 9-3. SROM Table
FAh
FBh
15.
FCh
FDh
Figure 9-3
CY7C63310, CY7C638xx
FEh
FFh
Page 19 of 86
Table 9-1
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