STLC5048TR STMicroelectronics, STLC5048TR Datasheet - Page 39

• Manufacturer Part Number: STLC5048TR
• Description: IC CODEC/FILTER PROGR 4CH 64TQFP
• Manufacturer: STMicroelectronics
• Type: PCM Codec/Filterr

Specifications of STLC5048TR

• Data Interface: PCM Audio Interface
• Resolution (bits): 16 b
• Number Of Adcs / Dacs: 4 / 4
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.3 V ~ 5 V
• Voltage - Supply, Digital: 3.3 V ~ 5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5048
5.28
5.29
Receive time slot ch #1 (DRTS1)
Addr=57h; reset value=00h
Table 55.
●
●
●
Example: if R16..R10=00:
Table 56.
Receive time slot ch #2 (DRTS2)
Addr=58h; reset value=00h
Table 57.
●
●
●
If linear mode is selected (LIN=1 of CONF register) the 16 bits will be used as linear code as
follows: the 8 most significant bits in the programmed time slot, the 8 least significant bits in
the following time slot.
Example: if R26..R20=00:
Table 58.
15
15
R/W
EN1
R/W
EN2
Bit7
Bit7
EN1=0: Disable reception of selected time slot.
EN1=1: Selected receive time slot on DR input is PCM decoded and transferred to
VFRO1 output.
R16..0: Define receive time slot number (0 to 127) on carrying the PCM signal to be
decoded and transferred to VFRO1 output. If linear mode is selected (LIN=1 of CONF
register) the 16 bits will be used as linear code as follows: the 8 most significant bits in
the programmed time slot, the 8 least significant bits in the following time slot.
EN2=0: Disable reception of selected time slot.
EN2=1: Selected receive time slot on DR input is PCM decoded and transferred to
VFRO2 output.
R26..0: Define receive time slot number (0 to 127) on carrying the PCM signal to be
decoded and transferred to VFRO2 output.
14
14
Receive time slot ch #1 (DRTS1) bits
Receive time slot ch #1 (DRTS1) time slots in linear mode
Receive time slot ch #2 (DRTS2) bits
Receive time slot ch #2 (DRTS2) time slots in linear mode
13
13
Bit6
Bit6
R16
R26
1
1
12
12
TS0
TS0
11
11
Bit5
R15
Bit5
R25
0
0
10
10
9
9
Bit4
R14
Bit4
R24
1
1
8
8
6
6
Bit3
Bit3
R13
R23
0
1
5
5
4
4
Bit2
R12
Bit2
R22
1
0
3
3
TS1
TS1
Register description
7
7
Bit1
R11
Bit1
R21
1
0
2
2
1
1
Bit0
R10
Bit0
R20
1
0
39/64
0
0