MC68MH360EM33L Freescale Semiconductor, MC68MH360EM33L Datasheet - Page 351

• Manufacturer Part Number: MC68MH360EM33L
• Description: IC MPU QUICC ETHER 33MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

FRZ1–FRZ0—Freeze
ARBP—Arbitration Priority
ISM—Interrupt Service Mask
Bits 7, 3–0—Reserved
IAID—IDMA Arbitration ID
MOTOROLA
These bits determine the action to be taken when the FREEZE signal is asserted. The
IDMA negates its internal bus request and keeps it negated until FREEZE is negated or
the IDMA is reset.
These two bits select the arbitration priority between the two IDMA channels.
These bits contain the interrupt service mask. When the interrupt service level on the IMB
is greater than the interrupt service mask, the IDMA vacates the bus and negates its bus
request to the IMB until the interrupt level service is less than or equal to the interrupt ser-
vice mask.
These bits establish bus arbitration priority level among sub-blocks that have the capabil-
ity of becoming bus master. In the QUICC, the IDMAs, the SDMAs, and the SIM60 DRAM
refresh controller can become bus masters. An arbitration ID uses a number (0–7) to de-
cide the priority of multiple bus masters that are requesting the IMB. A 0 is the lowest pri-
ority and a 7 is the highest priority.
The value programmed into the IAID bits is the arbitration ID of the highest priority IDMA
channel. The arbitration ID of the lowest priority IDMA channel is IAID minus 2. The ARBP
bits determine which IDMA channel has the higher priority. If round-robin priority is select-
ed, then the IDMA channels alternate between the two IAID values.
Example: If ARBP = 00, selecting IDMA channel 1 to always have the highest priority, the
IAID values are:
IDMA channel 1 arbitration ID = IAID
IDMA channel 2 arbitration ID = IAID – 2
00 = The IDMA channels ignore the FREEZE signal.
01 = Reserved.
10 = The IDMA channels freeze on the next bus cycle.
11 = Reserved.
00 = IDMA channel 1 has priority over channel 2.
01 = IDMA channel 2 has priority over channel 1.
10 = Rotating priority.
11 = Reserved.
The user should program ISM to 7 for typical user applications.
This gives the IDMA priority over all interrupt handlers. These
bits MUST be set to 7 if the QUICC is in slave mode.
The user should program IAID to 2 in typical user applications.
IAID should not be programmed to a value less than 2. This val-
Freescale Semiconductor, Inc.
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NOTES
NOTE
IDMA Channels
7-27