MC68MH360EM33L Freescale Semiconductor, MC68MH360EM33L Datasheet - Page 153

• Manufacturer Part Number: MC68MH360EM33L
• Description: IC MPU QUICC ETHER 33MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Besides the operation code, which specifies the function to be performed, an instruction de-
fines the location of every operand for the function. Instructions specify an operand location
in one of three ways:
The register field within an instruction specifies the register to be used. Other fields within
the instruction specify whether the register is an address or data register and how it is to be
used. The M68000PM/AD, M68000 Family Programmer’s Reference Manual , contains
detailed register information.
Except where noted, the following notation is used in this section:
MOTOROLA
• Register Specification
• Effective Address
• Implicit Reference
Data
Destination Destination contents
Source
Vector
An
Ax, Ay
Dn
Rc
Rn
Dh, Dl
Dr, Dq
Dx, Dy
Dym, Dyn
Immediate data from an instruction
Source contents
Location of exception vector
Any address register (A7–A0)
Address registers used in computation
Any data register (D7–D0)
Control register (VBR, SFC, DFC)
Any address or data register
Data registers, high- and low-order 32 bits of product
Data registers, division remainder, division quotient
Data registers, used in computation
Data registers, table interpolation values
15
OPERATION WORD
(ONE WORD, SPECIFIES OPERATION AND MODES)
SPECIAL OPERAND SPECIFIERS
(IF ANY, ONE OR TWO WORDS)
IMMEDIATE OPERAND OR SOURCE ADDRESS EXTENSION
(IF ANY, ONE TO THREE WORDS)
DESTINATION EFFECTIVE ADDRESS EXTENSION
(IF ANY, ONE TO THREE WORDS)
Figure 5-6. Instruction Word General Format
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
ber of the register.
tains address mode information.
specific registers.
A register field of the instruction contains the num-
An effective address field of the instruction con-
The definition of an instruction implies the use of
0
CPU32+
5-11