MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 558
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68030FE25C
Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Specifications of MC68030FE25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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MOTOROLA
from occurring from those cycles that access operands that are noncachable
Normally, as soon as AS is asserted, circuit (C) immediately asserts the
STERM signal to terminate the bus cycle, assuming that the cache will pro-
duce
or had missed in the cache on the previous cycle (and have not already been
retried). In this example, (C) prevents early termination of all CPU space
accesses, all write cycles (assuming a writethrough cache is implemented),
rviC68030
~ O U T
Q
SIZO-SIZ1
a valid hit later in the cycle. Circuit (C) also prevents the early termination
FCO-FC2
AO-A31
DO-D31
BGACK
CBACK
STERM
CBREQ
Figure 12-17. Example MC68030 Hardware Configuration with
CLOUT
RESET
8ERR
NAN
a M
RMC
~
CIIN
CLK
E~
CAI H EHT
t
TVLOW I
STERM
MC68030 USER'S MANUAL
•
External Physical Cache
i
I
i
b
i
TAG STORE,
COMPARE,
CONTROL
j
!
I
AND
;
I)
I'
II
#
!
OUTPUT
,
1
I
1
I/0 DEVICES.
BUFFERING
CONTROl-,
AND
12-33
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