MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 250
MC68EC020AA25
Manufacturer Part Number
MC68EC020AA25
Description
IC MPU 32BIT 25MHZ 100-QFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68EC020AA16.pdf
(306 pages)
Specifications of MC68EC020AA25
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Price
Company:
Part Number:
MC68EC020AA25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Part Number:
MC68EC020AA25R
Manufacturer:
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8.2.14 Bit Field Manipulation Instructions
The bit field manipulation instructions table indicates the number of clock periods needed
for the processor to perform the specified bit field operation using the given addressing
mode. Footnotes indicate when it is necessary to add another table entry to calculate the
total effective execution time for the instruction. The total number of clock cycles is outside
the parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
‡Add Calculate Immediate Address Time
NOTE: A bit field of 32 bits may span five bytes that require two operand cycles to access or may span four bytes that
8-36
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
‡
require only one operand cycle to access.
BFTST
BFTST
BFTST
BFCHG
BFCHG
BFCHG
BFCLR
BFCLR
BFCLR
BFSET
BFSET
BFSET
BFEXTS
BFEXTS
BFEXTS
BFEXTU
BFEXTU
BFEXTU
BFINS
BFINS
BFINS
BFFFO
BFFFO
BFFFO
Instruction
Dn
Mem (< 5 Bytes)
Dn
Mem (< 5 Bytes)
Dn
Mem (< 5 Bytes)
Dn
Mem (< 5 Bytes)
Mem (5 Bytes)
Dn
Mem (< 5 Bytes)
Mem (5 Bytes)
Dn
Dn
Mem (< 5 Bytes)
Dn
Mem (< 5 Bytes)
Mem (5 Bytes)
Mem (5 Bytes)
Mem (5 Bytes)
Mem (< 5 Bytes)
Mem (5 Bytes)
Mem (5 Bytes)
Mem (5 Bytes)
M68020 USER’S MANUAL
Best Case
11(1/0/0)
15(2/0/0)
16(1/0/1)
24(2/0/2)
16(1/0/1)
24(2/0/2)
16(1/0/1)
24(2/0/2)
13(1/0/0)
18(2/0/0)
13(1/0/0)
18(2/0/0)
14(1/0/1)
20(2/0/2)
15(0/0/0)
24(1/0/0)
32(2/0/0)
3(0/0/0)
9(0/0/0)
9(0/0/0)
9(0/0/0)
5(0/0/0)
5(0/0/0)
7(0/0/0)
Cache Case
11(1/0/0)
15(2/0/0)
12(0/0/0)
16(1/0/1)
24(2/0/2)
12(0/0/0)
16(1/0/1)
24(2/0/2)
12(0/0/0)
16(1/0/1)
24(2/0/2)
13(1/0/0)
18(2/0/0)
13(1/0/0)
18(2/0/0)
10(0/0/0)
14(1/0/1)
20(2/0/2)
18(0/0/0)
24(1/0/0)
32(2/0/0)
6(0/0/0)
8(0/0/0)
8(0/0/0)
Worst Case
12(1/1/0)
16(2/1/0)
12(0/1/0)
16(1/1/1)
24(2/1/2)
12(0/1/0)
16(1/1/1)
24(2/1/2)
12(0/1/0)
16(1/1/1)
24(2/1/2)
13(1/1/0)
18(2/1/0)
13(1/1/0)
18(2/1/0)
10(0/1/0)
15(1/1/1)
21(2/1/2)
18(0/1/0)
24(1/1/0)
32(2/1/0)
7(0/1/0)
8(0/1/0)
8(0/1/0)
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