MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 25

• Manufacturer Part Number: MC68EC020AA25
• Description: IC MPU 32BIT 25MHZ 100-QFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC020AA25

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

MOTOROLA
NOTE:
Register Direct
Register Indirect
Address Register Indirect with Index
Memory Indirect
PC Indirect with Displacement
PC Indirect with Index
PC Indirect
Absolute Data Addressing
Immediate
d
<data> =
8
Data
Address
Address
Address with Postincrement
Address with Predecrement
Address with Displacement
8-Bit Displacement
Base Displacement
Postindexed
Preindexed
8-Bit Displacement
Base Displacement
Postindexed
Preindexed
Short
Long
, d
PC
Dn
An =
Xn =
bd =
od =
16
( ) =
[ ]
=
=
=
=
Data Register, D7–D0
Address Register, A7–A0
A twos complement or sign-extended displacement added as part
of the effective address calculation; size is 8 (d
when omitted, assemblers use a value of zero.
Address or data register used as an index register; form is
Xn.SIZE
size) and SCALE is 1, 2, 4, or 8 (index register is multiplied by
SCALE); use of SIZE and/or SCALE is optional.
A twos-complement base displacement; when present, size can be
16 or 32 bits.
Outer displacement added as part of effective address calculation
after any memory indirection; use is optional with a size of 16 or 32
bits.
Program Counter
Immediate value of 8, 16, or 32 bits
Effective Address
Use as indirect access to long-word address.
Table 1-1. Addressing Modes
Addressing Modes
*
SCALE, where SIZE is .W or .L (indicates index register
M68020 USER’S MANUAL
8
) or 16 (d
([bd, PC], Xn, od)
([bd, PC, Xn], od)
([bd, An], Xn, od)
([bd, An, Xn], od)
(bd, PC, Xn)
(bd, An, Xn)
(d
(d
(d
(d
8
#<data >
Syntax
8
(xxx).W
(xxx).L
, PC, Xn)
(An)+
–(An)
, An, Xn)
16
16
(An)
16
Dn
An
, An)
, PC)
) bits;
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