MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 202
![IC MPU 32BIT 25MHZ 100-QFP](/photos/6/79/67921/qfp100-g1_pkg_sml.jpg)
MC68EC020AA25
Manufacturer Part Number
MC68EC020AA25
Description
IC MPU 32BIT 25MHZ 100-QFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68EC020AA16.pdf
(306 pages)
Specifications of MC68EC020AA25
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Quantity
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Company:
Part Number:
MC68EC020AA25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Part Number:
MC68EC020AA25R
Manufacturer:
Freescale Semiconductor
Quantity:
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The PC value saved in this stack frame is the operation word address of the coprocessor
instruction during which the primitive is received. The scanPC field contains the value of
the MC68020/EC020 scanPC when the primitive is received. If the current instruction does
not evaluate an effective address prior to the exception request primitive, the value of the
effective address field in the stack frame is undefined.
The coprocessor uses this primitive to request exception processing for an exception
during the instruction dialog with the main processor. If the exception handler does not
modify the stack frame, the MC68020/EC020 returns from the exception handler and
reads the response CIR. Thus, the main processor attempts to continue executing the
suspended instruction by reading the response CIR and processing the primitive it
receives.
7.4.20 Take Postinstruction Exception Primitive
The take postinstruction exception primitive initiates exception processing using a
coprocessor-supplied exception vector number and the postinstruction exception stack
frame format. This primitive applies to general and conditional category instructions.
Figure 7-44 shows the format of the take postinstruction exception primitive.
The take postinstruction exception primitive uses the PC bit as described in 7.4.2
Coprocessor Response Primitive General Format. The vector number field contains
the exception vector number used by the main processor to initiate exception processing.
When the main processor receives this primitive, it acknowledges the coprocessor
exception request by writing an exception acknowledge mask to the control CIR (refer to
7.3.2 Control CIR). The MC68020/EC020 then performs exception processing as
described in Section 6 Exception Processing. The vector number for the exception is
taken from the vector number field of the primitive, and the MC68020/EC020 uses the six-
word stack frame format shown in Figure 7-45.
MOTOROLA
15
0
Figure 7-44. Take Postinstruction Exception Primitive Format
PC
14
Figure 7-45. MC68020/EC020 Postinstruction Stack Frame
SP
13
0
+02
+06
+08
12
1
15
0
11
1
0
1
10
1
M68020 USER’S MANUAL
12
0
11
9
1
8
PROGRAM COUNTER
0
STATUS REGISTER
SCAN PC
7
VECTOR NUMBER
VECTOR NUMBER
0
0
7- 49
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