MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 210
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MC68340AG16E
Manufacturer Part Number
MC68340AG16E
Description
IC MPU 32BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG16E
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
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DSCLK, the gated serial clock, is normally high, but it pulses low for each bit to be
transferred. At the end of the seventeenth clock period, it remains high until the start of the
next transmission. Clock frequency is implementation dependent and may range from DC
to the maximum specified frequency. Although performance considerations might dictate a
hardware implementation, software solutions can be used provided serial bus timing is
maintained.
5.6.2.8 COMMAND SET. The following paragraphs describe the command set available in
BDM.
5.6.2.8.1 Command Format. The following standard bit format is utilized by all BDM
commands.
Bits 15–0—Operation Field
R/W Field
Operand Size
Address/Data (A/D) Field
MOTOROLA
15
The operation field specifies the commands. This 6-bit field provides for a maximum of
64 unique commands.
The R/W field specifies the direction of operand transfer. When the bit is set, the
transfer is from CPU to development system. When the bit is cleared, data is written to
the CPU or to memory from the development system.
For sized operations, this field specifies the operand data size. All addresses are
expressed as 32-bit absolute values. The size field is encoded as listed in Table 5-22.
The A/D field is used by commands that operate on address and data registers. It
determines whether the register field specifies a data or address register. One indicates
an address register; zero indicates a data register. For other commands, this field may
be interpreted differently.
OPERATION
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-22. Size Field Encoding
Encoding
10
00
01
10
11
MC68340 USER’S MANUAL
Go to: www.freescale.com
0
9
EXTENSION WORD(S)
R/W
8
7
OP SIZE
Operand Size
Reserved
6
Word
Long
Byte
5
0
4
0
A/D
3
2
REGISTER
5- 73
0
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