MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 166

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

5.3.3.10 CONDITION TESTS. Conditional program control instructions and the TRAPcc
instruction execute on the basis of condition tests. A condition test is the evaluation of a
logical expression related to the state of the CCR bits. If the result is 1, the condition is
true. If the result is 0, the condition is false. For example, the T condition is always true,
and the EQ condition is true only if the Z-bit condition code is true. Table 5-12 lists each
condition test.
5.3.4 Using the TBL Instructions
There are four TBL instructions. TBLS returns a signed, rounded byte, word, or long-word
result. TBLSN returns a signed, unrounded byte, word, or long-word result. TBLU returns
an unsigned, rounded byte, word, or long-word result. TBLUN returns an unsigned,
unrounded byte, word, or long-word result. All four instructions support two types of
interpolation data: an n-element table stored in memory and a two-element range stored in
a pair of data registers. The latter form provides a means of performing surface (3D)
interpolation between two previously calculated linear interpolations.
The following examples show how to compress tables and use fewer interpolation levels
between table entries. Example 1 (see Figure 5-7) demonstrates TBL for a 257-entry
table, allowing up to 256 interpolation levels between entries. Example 2 (see Figure 5-8)
reduces table length for the same data to four entries. Example 3 (see Figure 5-9)
demonstrates use of an 8-bit independent variable with an instruction.
MOTOROLA
* Not available for the Bcc instruction.
• = Boolean AND
+ = Boolean OR
N = Boolean NOT
Mnemonic
CC
CS
NE
EQ
VC
VS
GE
GT
F*
LS
PL
MI
LT
LE
HI
T
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For More Information On This Product,
Greater or Equal
Table 5-12. Condition Tests
Overflow Clear
Greater Than
Less or Equal
Low or Same
Overflow Set
Carry Clear
Condition
Less Than
Not Equal
Carry Set
MC68340 USER’S MANUAL
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Minus
False
Equal
True
High
Plus
Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
N V
Z + N V + N V
N V + N V
N
C Z
C + Z
V + N V
Test
Z + N V Z
C
C
V
V
N
N
1
0
Z
Z
5- 29