ADE7569ASTZF16 Analog Devices Inc, ADE7569ASTZF16 Datasheet - Page 97

• Manufacturer Part Number: ADE7569ASTZF16
• Description: IC ENERGY METER MCU 16K 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7569ASTZF16

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE75xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INTERRUPT VECTORS
When an interrupt occurs, the program counter is pushed
onto the stack, and the corresponding interrupt vector address
is loaded into the program counter. When the interrupt service
routine is complete, the program counter is popped off the stack
by an RETI instruction. This allows program execution to resume
from where it was interrupted. The interrupt vector addresses
are shown in Table 84.
Table 84. Interrupt Vector Addresses
Source
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
ITEMP (Temperature ADC)
ISPI/I2CI
IPSM (Power Supply)
IADE (Energy Measurement DSP)
IRTC (RTC Interval Timer)
WDT (Watchdog Timer)
1
INTERRUPT LATENCY
The 8052 architecture requires that at least one instruction
execute between interrupts. To ensure this, the 8052 MCU
core hardware prevents the program counter from jumping to
an ISR immediately after completing an RETI instruction or an
access of the IP and IE SFRs.
The shortest interrupt latency is 3.25 instruction cycles, 800 ns
with a clock of 4.096 MHz. The longest interrupt latency for a
high priority interrupt results when a pending interrupt is
generated during a low priority interrupt RETI, followed by a
multiply instruction. This results in a maximum interrupt
latency of 16.25 instruction cycles, 4 μs with a clock of 4.096 MHz.
This feature is not available in the ADE7116.
1
Vector Address
0x0003
0x000B
0x0013
0x001B
0x0023
0x002B
0x0033
0x003B
0x0043
0x0053
0x004B
0x005B
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
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CONTEXT SAVING
When the 8052 vectors to an interrupt, only the program counter
is saved on the stack. Therefore, the interrupt service routine
must be written to ensure that registers used in the main
program are restored to their pre-interrupt state. Common
SFRs that can be modified in the ISR are the accumulator
register and the PSW register. Any general-purpose registers
that are used as scratch pads in the ISR should also be restored
before exiting the interrupt. The following example 8052 code
shows how to restore some commonly used registers:
GeneralISR:
; save the current Accumulator value
; save the current status and register bank
selection
; service interrupt
…
; restore the status and register bank
selection
; restore the accumulator
PUSH
PUSH
POP
POP
RETI
ACC
PSW
PSW
ACC