XC5VFX30T-1FFG665CES Xilinx Inc, XC5VFX30T-1FFG665CES Datasheet - Page 171

IC FPGA VIRTEX5FX 30K 665FCBGA

XC5VFX30T-1FFG665CES

Manufacturer Part Number
XC5VFX30T-1FFG665CES
Description
IC FPGA VIRTEX5FX 30K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 FXTr

Specifications of XC5VFX30T-1FFG665CES

Number Of Logic Elements/cells
32768
Number Of Labs/clbs
2560
Total Ram Bits
2506752
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS non-compliant
Number Of Gates
-

Available stocks

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Quantity
Price
Part Number:
XC5VFX30T-1FFG665CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VFX30T-1FFG665CES
Manufacturer:
XILINX
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Part Number:
XC5VFX30T-1FFG665CES9992
Manufacturer:
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Legal Block RAM and FIFO Combinations
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM ECC VHDL and Verilog Templates
VHDL and Verilog templates are available in the Libraries Guide.
The block RAM–FIFO combinations shown in
RAMB36 primitive. When placing block RAM and FIFO primitives in the same location,
the FIFO must occupy the lower port.
X-Ref Target - Figure 4-33
RAMB18
RAMB18
Figure 4-33: Legal Block RAM and FIFO Combinations
www.xilinx.com
RAMB18SDP
RAMB18SDP
Legal Block RAM and FIFO Combinations
Figure 4-33
RAMB18
FIFO18
are supported in a single
RAMB18SDP
FIFO18_36
ug0190_4_35_050208
171

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