XC5VFX30T-1FFG665CES Xilinx Inc, XC5VFX30T-1FFG665CES Datasheet - Page 78
![IC FPGA VIRTEX5FX 30K 665FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VFX30T-1FFG665CES
Manufacturer Part Number
XC5VFX30T-1FFG665CES
Description
IC FPGA VIRTEX5FX 30K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 FXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VFX30T-1FFG665CES
Number Of Logic Elements/cells
32768
Number Of Labs/clbs
2560
Total Ram Bits
2506752
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VFX30T-1FFG665CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
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- Download datasheet (14Mb)
Chapter 2: Clock Management Technology
78
X-Ref Target - Figure 2-11
Figure 2-11: Board Deskew with Internal Deskew Interfacing to Other Virtex
IBUFG
IBUFG
IBUFG
for Virtex and Virtex-E devices, DCM for Virtex-II and Virtex-II Pro devices.
This circuit can be duplicated to multiple Virtex devices. Use CLKDLL
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
www.xilinx.com
Virtex-5 FPGA
Virtex-5 FPGA
DCM_ADV
DCM_ADV
DCM_ADV
CLKFX180
CLKFX180
CLKFX180
CLK2X180
CLK2X180
CLK2X180
LOCKED
DO[15:0]
LOCKED
DO[15:0]
LOCKED
DO(15:0)
CLK180
CLK270
CLK180
CLK270
CLK180
CLK270
CLKDV
CLKFX
CLKDV
CLKFX
CLKDV
CLKFX
CLK2X
CLK2X
CLK2X
CLK90
CLK90
CLK90
CLK0
CLK0
CLK0
Devices
BUFG
BUFG
BUFG
INV
V
CC
GND
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
OBUF
D1
D2
C
ODDR
Q
ug190_2_12_032506
to
RST
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