EP1SGX25CF672C6 Altera, EP1SGX25CF672C6 Datasheet - Page 257

IC STRATIX GX FPGA 25KLE 672FBGA

EP1SGX25CF672C6

Manufacturer Part Number
EP1SGX25CF672C6
Description
IC STRATIX GX FPGA 25KLE 672FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet

Specifications of EP1SGX25CF672C6

Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
455
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Stratix GX
Number Of Logic Blocks/elements
25660
# I/os (max)
455
Frequency (max)
5GHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.5V
Logic Cells
25660
Ram Bits
1944576
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1SGX25CF672C6
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1SGX25CF672C6
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX25CF672C6
Manufacturer:
ALTERA
0
Part Number:
EP1SGX25CF672C6
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP1SGX25CF672C6ES
Manufacturer:
ALTERA
Quantity:
5
Part Number:
EP1SGX25CF672C6ES
Manufacturer:
ALTERA
0
Part Number:
EP1SGX25CF672C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX25CF672C6N
Manufacturer:
ALTERA
0
Altera Corporation
June 2006
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
GTL
GTL+
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.5-V HSTL class I
1.5-V HSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
3.3-V PCI
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
Differential HSTL
LVDS
LVPECL
PCML
HyperTransport technology
LVTTL
2.5 V
Table 6–82. Stratix GX Maximum Input Clock Rate for CLK[0, 2, 9, 11] Pins & FPLL[8..7]CLK Pins
Table 6–83. Stratix GX Maximum Input Clock Rate for CLK[1, 3, 8, 10] Pins (Part 1 of 2)
I/O Standard
I/O Standard
-5 Speed Grade -6 Speed Grade -7 Speed Grade
-5 Speed Grade -6 Speed Grade -7 Speed Grade
422
422
400
400
400
400
422
422
400
717
400
422
422
422
422
422
300
300
400
400
400
400
400
400
422
422
422
300
717
717
422
422
422
422
422
422
422
250
250
350
350
350
350
350
350
350
350
350
350
422
422
422
422
422
250
350
717
717
375
717
Stratix GX Device Handbook, Volume 1
DC & Switching Characteristics
390
390
390
390
390
390
390
200
200
300
300
300
300
300
300
300
300
300
300
390
390
390
390
390
200
300
640
640
350
640
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
6–55

Related parts for EP1SGX25CF672C6