ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 30

• Manufacturer Part Number: ST7265XEVALMS
• Manufacturer: STMicroelectronics

Specifications of ST7265XEVALMS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST7265x
RESET SEQUENCE MANAGER (Cont’d)
In stand-alone mode, the 512 CPU clock cycle de-
lay allows the oscillator to stabilize and ensures
that recovery has taken place from the Reset
state.
Figure 19. Reset Delay in Stand-alone Mode
Figure 20. Reset Delay in USB Mode
Note: For a description of Stand-alone mode and USB mode refer to
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1
RESET
RESET
DELAY
DELAY
256 x t
CPU(STAND-ALONE)
512 x t
400 µs typ.
CPU(STAND-ALONE)
PLL Startup
time (undefined)
In USB mode the delay is 256 clock cycles count-
ed from when the PLL LOCK signal goes high.
The RESET vector fetch phase duration is 2 clock
cycles.
256 x t
Section
CPU(USB)
FETCH VECTOR
6.4.
FETCH VECTOR