ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 28

• Manufacturer Part Number: ST7265XEVALMS
• Manufacturer: STMicroelectronics

Specifications of ST7265XEVALMS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST7265x
6.2 RESET SEQUENCE MANAGER (RSM)
6.2.1 Introduction
The reset sequence manager includes three RE-
SET sources as shown in
■
■
■
These sources act on the RESET pin and it is al-
ways kept low during the delay phase.
Figure 17. RESET Sequences
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1
External RESET source pulse
Internal LVD RESET (Low Voltage Detection)
Internal WATCHDOG RESET
WATCHDOG
RESET
EXTERNAL
RESET
SOURCE
RESET PIN
V
V
IT+(LVD)
IT-(LVD)
V
RUN
DD
ACTIVE PHASE
Figure
RESET
LVD
6.2.2:
t
t
w(RSTL)out
h(RSTL)in
RUN
ACTIVE
PHASE
SHORT EXT.
RESET
DELAY
The RESET service routine vector is fixed at ad-
dresses FFFEh-FFFFh in the ST7 memory map.
The basic RESET sequence consists of 3 phases
as shown in
■
■
■
t
Active Phase depending on the RESET source
Min 512 CPU clock cycle delay (see
and
RESET vector fetch
h(RSTL)in
t
w(RSTL)out
RUN
Figure 20
WATCHDOG UNDERFLOW
Figure
ACTIVE
PHASE
LONG EXT.
RESET
17:
INTERNAL RESET (min 512 T
VECTOR FETCH
RUN
ACTIVE
PHASE
WATCHDOG
RESET
t
w(RSTL)out
Figure 19
RUN
CPU
)