JG82855GME S L7VN Intel, JG82855GME S L7VN Datasheet - Page 108

• Manufacturer Part Number: JG82855GME S L7VN
• Manufacturer: Intel

Specifications of JG82855GME S L7VN

• Package Type: FCBGA
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

108
Register Description
4.10.5
4.10.6
4.10.7
RID – Revision Identification Register
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number of the Intel 855GM/GME GMCH. These bits are Read
Only and Writes to this register have no effect.
SUBC – Sub-Class Code Register
Address Offset:
Default Value:
Access:
Size:
This register contains the Sub-Class Code for the Intel 855GM/GME GMCH Device #0. This
code is 80h indicating a peripheral device.
BCC – Base Class Code Register
Address Offset:
Default Value:
Access:
Size:
This register contains the Base Class Code of the Intel 855GM/GME GMCH Device #0 Function
#3. This code is 08h indicating a peripheral device.
7:0
7:0
7:0
Bit
Bit
Bit
Revision Identification Number (RID): This is an 8-bit value that indicates the revision identification
number for the GMCH.
Sub-Class Code (SUBC): This is an 8-bit value that indicates the category of Bridge into which GMCH
falls. The code is 80h indicating other peripheral device.
Base Class Code (BASEC): This is an 8-bit value that indicates the Base Class code for the GMCH.
This code has the value 08h, indicating other peripheral device.
08h
02h
Read Only
8 bits
0Ah
80h
Read Only
8 bits
0Bh
08h
Read Only
8 bits
Description
Description
Description
Datasheet
R