MAX19711ETN+T Maxim Integrated Products, MAX19711ETN+T Datasheet - Page 4

• Manufacturer Part Number: MAX19711ETN+T
• Description: IC ANLG FRNT END 56-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX19711ETN+T

• Number Of Bits: 10
• Number Of Channels: 2
• Power (watts): 37.5mW
• Voltage - Supply, Analog: 3V
• Voltage - Supply, Digital: 3V
• Package / Case: 56-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10-Bit, 11Msps, Full-Duplex
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(V
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, V
DAC output, C
values are at T
4
Rx ADC CONVERSION RATE
Maximum Clock Frequency
Data Latency
Rx ADC DYNAMIC CHARACTERISTICS (Note 3)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion
Spurious-Free Dynamic Range
Total Harmonic Distortion
Third-Harmonic Distortion
Intermodulation Distortion
Third-Order Intermodulation
Distortion
Aperture Delay
Aperture Jitter
Overdrive Recovery Time
Rx ADC INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
Amplitude Matching
Phase Matching
Tx PATH DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Residual DC Offset
Full-Scale Gain Error
DD
_______________________________________________________________________________________
= 3V, OV
PARAMETER
A
REFP
DD
= +25°C.) (Note 1)
= 1.8V, internal reference (1.024V), C
= C
REFN
= C
COM
= 0.33µF, C
SYMBOL
SINAD
SFDR
f
SNR
THD
HD3
DNL
IMD
V
IM3
INL
CLK
N
OS
L
< 5pF on all aux-DAC outputs, T
(Note 2)
Channel IA
Channel QA
f
f
f
f
f
f
f
f
f
f
f
f
f
f
1.5x full-scale input
f
1M H z, A
f
f
Guaranteed monotonic (Note 6)
T
T
V
V
IN X ,Y
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN1
IN2
IN1
IN2
A
A
FS
FS
= 1.8MHz, A
= 1.8MHz, A
= 1.875MHz
= 3MHz
= 1.875MHz
= 3MHz
= 1.875MHz
= 3MHz
= 1.875MHz
= 3MHz
= 1.875MHz
= 3MHz
≥ +25°C
< +25°C
L
= 1.7MHz, A
= 900kHz, A
= 1.7MHz, A
= 900kHz, A
= 410mV
= 500mV
= 1.8M H z, A
≈ 10pF on all digital outputs, f
IN Y ,X
FS
= 410mV, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx
= - 0.5d BFS ( N ote 4)
CONDITIONS
IN
IN
IN1
IN2
IN1
IN2
IN X ,Y
= -0.5dBFS (Note 5)
= -0.5dBFS (Note 5)
= -7dBFS;
= -7dBFS
= -7dBFS;
= -7dBFS
= - 0.5d BFS , f
A
IN Y ,X
= T
CLK
MIN
=
= 11MHz (50% duty cycle), Rx ADC input
to T
MAX
53.3
53.2
64.5
MIN
-0.9
-50
-52
10
-5
-7
, unless otherwise noted. Typical
±0.01
±0.01
±0.55
-72.1
-82.8
-78.3
±0.4
±0.5
±0.5
TYP
54.8
54.8
54.8
54.7
74.2
78.3
-75
-71
-75
-89
5.5
3.5
±9
±9
2
5
2
-63.5
MAX
+0.9
+50
+52
+5
+7
11
D eg r ees
Cycles
UNITS
ps
Clock
MHz
dBc
dBc
dBc
dBc
dBc
LSB
LSB
Bits
mV
mV
dB
dB
dB
dB
ns
ns
RMS