IDT82V3288BCG IDT, Integrated Device Technology Inc, IDT82V3288BCG Datasheet - Page 16

• Manufacturer Part Number: IDT82V3288BCG
• Description: IC PLL WAN 3E STRATUM 2 208CABGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3288BCG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 208-CABGA
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3288BCG

Table 1: Pin Description (Continued)
Pin Description
IDT82V3288
OUT_155_POS
OUT_155_NEG
OUT_622_POS
OUT_622_NEG
MPU_MODE0
MPU_MODE1
MPU_MODE2
A1 / CLKE
INT_REQ
A0 / SDI
Name
CS
A2
A3
A4
A5
A6
Pin No.
D16
D15
D14
C13
C14
C15
C16
B14
A16
B15
B16
M1
N1
T6
T7
F3
pull-down
pull-down
pull-up
I/O
O
O
O
I
I
I
CMOS
CMOS
CMOS
CMOS
PECL
PECL
Type
Microprocessor Interface
OUT_155_POS / OUT_155_NEG: Positive / Negative 155.52 MHz Output Clock
A 155.52 MHz clock is differentially output on this pair of pins.
OUT_622_POS / OUT_622_NEG: Positive / Negative 622.08 MHz Output Clock
A 622.08 MHz clock is differentially output on this pair of pins.
CS: Chip Selection
A transition from high to low must occur on this pin for each read or write operation and this
pin should remain low until the operation is over.
INT_REQ: Interrupt Request
This pin is used as an interrupt request. The output characteristics are determined by the
HZ_EN bit (b1, 0CH) and the INT_POL bit (b0, 0CH).
MPU_MODE[2:0]: Microprocessor Interface Mode Selection
The device supports five microprocessor interface modes: EPROM, Multiplexed, Intel, Motor-
ola and Serial.
During reset, these pins determine the default value of the MPU_SEL_CNFG[2:0] bits (b2~0,
7FH) as follows:
001 (EPROM mode);
010 (Multiplexed mode);
011 (Intel mode);
100 (Motorola mode);
101 (Serial mode);
110 - 111 (Reserved).
After reset, these pins are general purpose inputs. The microprocessor interface mode is
selected by the MPU_SEL_CNFG[2:0] bits (b2~0, 7FH).
The value of these pins is always reflected by the MPU_PIN_STS[2:0] bits (b2~0, 02H).
A[6:0]: Address Bus
In ERPOM, Intel and Motorola modes, these pins are the address bus of the microprocessor
interface.
SDI: Serial Data Input
In Serial mode, this pin is used as the serial data input. Address and data on this pin are seri-
ally clocked into the device on the rising edge of SCLK.
CLKE: SCLK Active Edge Selection
In Serial mode, this pin selects the active edge of SCLK to update the SDO:
High - The falling edge;
Low - The rising edge.
In Multiplexed mode, A0/SDI, A1/CLKE and A[6:2] pins should be connected to ground.
In Serial mode, A[6:2] pins should be connected to ground.
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Description
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March 14, 2007
WAN PLL