IDT82V3288BCG IDT, Integrated Device Technology Inc, IDT82V3288BCG Datasheet - Page 156

• Manufacturer Part Number: IDT82V3288BCG
• Description: IC PLL WAN 3E STRATUM 2 208CABGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3288BCG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 208-CABGA
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3288BCG

Table 51: CMOS Input Port with Internal Pull-Down Resistor Electrical Characteristics
9.3.1.3
according to ITU Recommendation K.41.
9.3.2
Table 49: CMOS Input Port Electrical Characteristics
Table 50: CMOS Input Port with Internal Pull-Up Resistor Electrical Characteristics
Table 52: CMOS Output Port Electrical Characteristics
Electrical Specifications
IDT82V3288
Application Pin
Parameter
The device may require over-voltage protection on AMI input ports
From
Output Clock
Other Output
Parameter
Parameter
V
V
V
P
I
IN
IH
IN
IL
D
V
V
V
V
V
V
P
Table 49
I
I
IN
IN
IH
IL
IN
IH
IL
IN
U
Over-Voltage Protection
CMOS INPUT / OUTPUT PORT
to
Table
Pull-Down Resistor
Input Voltage High
Input Voltage Low
Input Current
Input Voltage
Description
Parameter
52, V
V
V
V
V
t
t
t
t
OH
OH
OL
OL
R
F
R
F
Input Voltage High
Input Voltage High
Input Voltage Low
Input Voltage Low
Pull-Up Resistor
DD
Input Current
Input Voltage
Input Current
Input Voltage
Description
Description
is 3.3 V.
Output Voltage High
Output Voltage High
Output Voltage Low
Output Voltage Low
Description
0.7V
Rise Time
Rise time
Fall Time
Min
Fall time
100
-0.5
10
5
DD
Typ
0.7V
0.7V
Min
-0.5
Min
-0.5
10
DD
DD
0.2V
Min
156
Max
2.4
2.5
300
350
700
5.5
0
0
80
40
40
DD
Typ
Typ
Unit
K Ω
µ A
V
V
V
Typ
3
3
other CMOS input port with internal pull-down resistor
other CMOS input port with internal pull-down resistor
0.2V
0.2V
Max
Max
250
5.5
5.5
10
80
Max
DD
DD
V
V
0.4
0.4
10
10
DD
4
4
DD
A[6:0], AD[7:0] pins
A[6:0], AD[7:0] pins
TRST and TCK pin
TRST and TCK pin
Test Condition
Unit
Unit
K Ω
Unit
µ A
µ A
V
V
V
V
V
V
ns
ns
ns
ns
V
V
V
V
March 14, 2007
Test Condition
Test Condition
Test Condition
I
I
I
I
OH
OH
OL
OL
15 pF
15 pF
50 pF
50 pF
= 4 mA
= 8 mA
= 8 mA
= 4 mA
WAN PLL